Srl %r – Epson S1C63000 User Manual
Page 139
S1C63000 CORE CPU MANUAL
EPSON
133
CHAPTER 4: INSTRUCTION SET
SLP
Set CPU to SLEEP mode
2 cycles
Function:
Sleep
Sets the CPU to SLEEP status.
The CPU and the peripheral circuits including the oscillation circuit stops operating, thus the
power consumption is substantially reduced.
An interrupt from outside the MCU causes it to return from SLEEP status to the normal
program execution status.
Code:
Mnemonic
MSB
LSB
SLP
1
1
1
1
1
1
1
1
1
1
1
0
1
1FFDH
Flags:
E
I
C
Z
↓
–
–
–
SRL %r
Shift right r reg. logical
1 cycle
Function:
Shifts the content of the r register (A or B) to the right for 1 bit. Bit 0 of the r register moves to
the C flag and bit 3 goes "0".
Code:
Mnemonic
MSB
LSB
SRL %A
1
0
0
0
0
1
1
1
1
0
0
0
1
10F1H
SRL %B
1
0
0
0
0
1
1
1
1
0
1
0
1
10F5H
Flags:
E
I
C
Z
↓
–
↕
↕
Mode:
Register direct
Extended addressing: Invalid
r
C
3 2 1 0
0