Zilog EZ80F916 - Manual (Page 289)

UM014423-0607 Using the Linker/Locator
ZiLOG Developer Studio II
eZ80Acclaim! ® User Manual
269
DEFINE __len_data = length of DATA
DEFINE __low_bss = base of BSS
DEFINE __len_bss = length of BSS
DEFINE __stack = highaddr of RAM + 1
DEFINE __heaptop = highaddr of RAM
DEFINE __heapbot = top of RAM + 1
DEFINE __low_romcode = copy base of CODE
DEFINE __low_code = base of CODE
DEFINE __len_code = length of CODE
DEFINE __copy_code_to_ram = 0
DEFINE __crtl = 1
DEFINE __CS0_LBR_INIT_PARAM = $10
DEFINE __CS0_UBR_INIT_PARAM = $1f
DEFINE __CS0_CTL_INIT_PARAM = $a8
DEFINE __CS0_BMC_INIT_PARAM = $02
DEFINE __CS1_LBR_INIT_PARAM = $00
DEFINE __CS1_UBR_INIT_PARAM = $07
DEFINE __CS1_CTL_INIT_PARAM = $28
DEFINE __CS1_BMC_INIT_PARAM = $02
DEFINE __CS2_LBR_INIT_PARAM = $80
DEFINE __CS2_UBR_INIT_PARAM = $bf
DEFINE __CS2_CTL_INIT_PARAM = $28
DEFINE __CS2_BMC_INIT_PARAM = $02
DEFINE __CS3_LBR_INIT_PARAM = $00
DEFINE __CS3_UBR_INIT_PARAM = $00
DEFINE __CS3_CTL_INIT_PARAM = $00
DEFINE __CS3_BMC_INIT_PARAM = $02
DEFINE __RAM_CTL_INIT_PARAM = $C0
DEFINE __RAM_ADDR_U_INIT_PARAM = $B7
DEFINE __FLASH_CTL_INIT_PARAM = $60
DEFINE __FLASH_ADDR_U_INIT_PARAM = $00
define _SYS_CLK_FREQ = 20000000
define _OSC_FREQ = 20000000
define _SYS_CLK_SRC = 0
define _OSC_FREQ_MULT = 1
define __PLL_CTL0_INIT_PARAM = $00
define _zsl_g_clock_xdefine = 50000000
"C:\PROGRA~1\ZiLOG\UNDERD~1\ZDSII_~2.0\samples\EZ80F9~1\src\ledDemo"=
C:\PROGRA~1\ZiLOG\UNDERD~1\ZDSII_~2.0\lib\zilog\vectors24.obj,
C:\PROGRA~1\ZiLOG\UNDERD~1\ZDSII_~2.0\lib\zilog\init_params_f91.obj,
C:\PROGRA~1\ZiLOG\UNDERD~1\ZDSII_~2.0\lib\zilog\cstartup.obj, .\Buttons.obj,
.\LedMatrix.obj, .\LedTimer.obj, .\main.obj, .\zsldevinit.obj,
C:\PROGRA~1\ZiLOG\UNDERD~1\ZDSII_~2.0\lib\std\chelpD.lib,
C:\PROGRA~1\ZiLOG\UNDERD~1\ZDSII_~2.0\lib\std\crtD.lib,
C:\PROGRA~1\ZiLOG\UNDERD~1\ZDSII_~2.0\lib\std\fpdumy.obj,