Altera 40-Gbps Ethernet MAC and PHY MegaCore Function User Manual
Page 75

40-100GbE IP Core RX Data Bus Without Adapters (Custom Streaming Interface)
The RX bus without adapters consists of five 8-byte words, or 320 bits, operating at a frequency above
315 MHz for the 100GbE IP core or two 8-byte words, or 128 bits, for the 40GbE IP core, nominally at
315 MHz. This bus drives data from the RX MAC to the RX client.
Figure 3-25: RX MAC to Client Interface Without Adapters
The custom streaming interface bus width varies with the IP core variation. In the figure,
40GbE IP core and
RX Client
Logic
RX MAC
dout_d[
dout_c[
dout_first_data[
dout_last_data[
dout_payload[
dout_runt_last_data[
dout_fcs_error
dout_fcs_valid
dout_dst_addr_match[
dout_valid
clk_rxmac
Table 3-6: Signals of the RX Client Interface Without Adapters
In the table,
Signal Name
Direction
Description
dout_d[
1:0]
Output
Received data and Idle bytes. In RX preamble pass-through mode, this
bus also carries the preamble.
dout_c[
1:0]
Output
Indicates control bytes on the data bus. Each bit of dout_c indicates
whether the corresponding byte of
dout_d
is a control byte. A bit is
asserted high if the corresponding byte on
dout_d
is an Idle byte or the
Start byte, and has the value of zero if the corresponding byte is a data
byte or, in preamble pass-through mode, a preamble or SFD byte.
dout_first_
data[
Output
Indicates the first data word of a frame, in the current
clk_rxmac
cycle.
In RX preamble pass-through mode, the first data word is the word
that contains the preamble. When the RX preamble pass-through
feature is turned off, the first data word is the first word of Ethernet
data that follows the preamble.
dout_last_
data[
Output
Indicates the final data byte of a frame, before the FCS, in the current
clk_rxmac
cycle.
3-28
40-100GbE IP Core RX Data Bus Without Adapters (Custom Streaming Interface)
UG-01088
2014.12.15
Altera Corporation
Functional Description