Mac hardware error register – Altera 40-Gbps Ethernet MAC and PHY MegaCore Function User Manual
Page 151
MAC Hardware Error Register
Table 3-43: MAC Hardware Error Register
Address
Name
Bit
Description
HW
Reset
Value
Access
0x120
MAC_HW_ERR
[6]
When asserted, indicates a parity error in the
Drop
on Error
storage RAM section.
1’b0
R
[5]
When asserted, indicates a parity error in the
DOE
command FIFO buffer section.
1’b0
R
[4]
When asserted, indicates a
DOE_COMMAND
FIFO
buffer overflow error.
1’b0
R
[3]
When asserted, indicates a parity error in the TX
CRC read-ram (TXC) section.
1’b0
R
[2]
When asserted, indicates a parity error in the TX
CRC write-ram (TXW) section.
1’b0
R
[1]
When asserted, indicates a parity error in the RX
inspector (RXI) section.
1’b0
R
[0]
When asserted, indicates a TX CRC FIFO buffer
overflow error.
1’b0
R
3-104
MAC Hardware Error Register
UG-01088
2014.12.15
Altera Corporation
Functional Description