Altera 40-Gbps Ethernet MAC and PHY MegaCore Function - Manual (Page 68)

40-100GbE IP Core RX Filtering
The 40-100GbE IP core can operate in cut-through mode or in store and forward mode. In cut-through
mode, the IP core does not buffer incoming Ethernet packets for filtering. It can filter out incoming runt
packets, but cannot filter on any other criteria. The value in bit 0 of the
RX_FILTER_CTRL
register at offset
0x103 determines the mode, and the value in bit 3 determines whether the IP core filters runt packets.
When the IP core is in cut-through mode, it does not filter incoming Ethernet packets based on destina‐
tion address. Therefore, when in cut-through mode, the IP core is in promiscuous receive mode. The
Ethernet standard definition of promiscuous receive mode requires that the IP core accept all valid
frames, regardless of destination address. The 40-100GbE IP core accepts or rejects invalid frames based
on the filtering criteria that are turned on.
In store and forward mode, you can enable oversized-frame handling. When the maximum frame size is
set to 9600 bytes, the IP core passes some of the frames between 9601-9644 bytes in size, and drops frames
of 9645 bytes or more. For the 100GbE IP core, if the frame size is within 44 bytes over the specified
maximum frame size, it may or may not be dropped, but oversized frames of over 44 bytes will always be
dropped. For the 40GbE IP core, if the frame size is within 20 bytes over the specified maximum frame
size, it may or may not be dropped, but oversized frames of over 20 bytes will always be dropped.
The 40-100GbE IP core supports the following filtering options:
• Destination address mismatch—refer to the descriptions of the
RX_FILTER_CTRL
register and the
MADDR_CTRL
register and the link below to the Address Checking topic.
• Runt frame—refer to the description of the
dout_runt_last_data
signal.
• Oversized frame—refer to the preceding description.
• Pause packet
• Control packet
• FCS error
Related Information
• Address Checking on page 3-24
Information about address filtering.
• MAC Address Registers on page 3-107
Information about the
MADDR_CTRL
register and related address-checking registers.
• MAC Configuration and Filter Registers on page 3-99
Additional information about the filtering options, including information about the
RX_FILTER_CTRL
register.
• 40-100GbE IP Core TX Data Bus Without Adapters (Custom Streaming Interface) on page 3-9
Information about the
dout_runt_last_data
signal.
• Pause Control Frame and Non-Pause Control Frame Filtering and Forwarding on page 3-36
• 40-100GbE IP Core Modes of Operation on page 3-37
Overview of filtering status.
40-100GbE IP Core Preamble Processing
The preamble sequence is Start, six preamble bytes, and SFD. If this sequence is incorrect the frame is
ignored. The Start byte must be on receive lane 0 (most significant byte). The IP core uses the SFD byte
(0xD5) to identify the last byte of the preamble. The MAC RX looks for the Start, six preamble bytes and
SFD.
UG-01088
2014.12.15
40-100GbE IP Core RX Filtering 3-21
Functional Description Altera Corporation
Send Feedback