100gbe ip core example design – Altera 40-Gbps Ethernet MAC and PHY MegaCore Function User Manual
Page 169
40-100GbE IP Core Example Design
A
2014.12.15
UG-01088
Altera provides an example design with the 40-100GbE IP core. This example design is ready for
compilation and can be configured on a C2 speed grade device.
You can use the example design as an example for correct connection of your IP core to your design, or as
a starter design you can customize for your own design requirements.
Separate figures illustrate the example design structure for 40GBASE-KR IP core variations and for the
other IP core variations.
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