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Altera 40-Gbps Ethernet MAC and PHY MegaCore Function User Manual

Page 54

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bits). In both cases the client interfaces operate at a frequency above 315 MHz in the standard IP core

variations, and at or above the frequency of 190.90 MHz in 24.24 Gbps variations.
The client acts as a source and the TX MAC acts as a sink in the transmit direction.

Figure 3-3: TX Client to MAC Interface with Adapters (Avalon-ST)

The Avalon-ST interface bus width varies with the IP core variation. In the figure, = 4 for the 40GbE

IP core and = 8 for the 100GbE IP core. is log

2

(8*).

l_tx_data[*64-1:0]

l_tx_empty[-1:0]

l_tx_startofpacket

l_tx_endofpacket

l_tx_ready

l_tx_valid

TX MAC

TX Client

Logic

Table 3-2: Signals of the TX Client Interface with Adapters

In the table, = 4 for the 40GbE IP core and = 8 for the 100GbE IP core. is log

2

(8*). All interface

signals are clocked by the

clk_txmac

clock.

Signal Name

Direction

Description

l_tx_data[*64-1:0]

Input

TX data. If the preamble pass-through feature is enabled,

data begins with the preamble.

l_tx_empty[-1:0]

Input

Indicates the number of empty bytes on

l_tx_data

when

l_tx_endofpacket

is asserted.

l_tx_startofpacket

Input

When asserted, indicates the start of a packet. The packet

starts on the MSB.

l_tx_endofpacket

Input

When asserted, indicates the end of packet.

UG-01088

2014.12.15

40-100GbE IP Core TX Data Bus with Adapters (Avalon-ST Interface)

3-7

Functional Description

Altera Corporation

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