Altera Arria V Avalon-MM - Manual (Page 21)

Parameter Value Description
The Message window of the GUI dynamically updates the
number of credits for Posted, Non-Posted Headers and Data,
and Completion Headers and Data as you change this
selection.
• Minimum RX Buffer credit allocation -performance for
received requests )–This setting configures the minimum
PCIe specification allowed for non-posted and posted
request credits, leaving most of the RX Buffer space for
received completion header and data. Select this option for
variations where application logic generates many read
requests and only infrequently receives single requests
from the PCIe link.
• Low–This setting configures a slightly larger amount of RX
Buffer space for non-posted and posted request credits, but
still dedicates most of the space for received completion
header and data. Select this option for variations where
application logic generates many read requests and
infrequently receives small bursts of requests from the
PCIe link. This option is recommended for typical
endpoint applications where most of the PCIe traffic is
generated by a DMA engine that is located in the endpoint
application layer logic.
• Balanced–This setting allocates approximately half the RX
Buffer space to received requests and the other half of the
RX Buffer space to received completions. Select this option
for variations where the received requests and received
completions are roughly equal.
Reference clock
frequency
100 MHz
125 MHz The PCI Express Base Specification requires a
100 MHz ±300 ppm reference clock. The 125 MHz reference
clock is provided as a convenience for systems that include a
125 MHz clock source.
Use 62.5 MHz
application clock
On/Off This mode is only available only for Gen1 ×1.
Enable configu‐
ration via PCIe
link
On/Off When On, the Quartus II software places the Endpoint in the
location required for configuration via protocol (CvP). For
more information about CvP, click the Configuration via
Protocol (CvP) link below. CvP is not supported for Gen3
variants.
Related Information
PCI Express Base Specification 2.1 or 3.0
3-2 Avalon-MM System Settings
UG-01105_avmm
2014.12.15
Altera Corporation Parameter Settings
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