Altera Arria V Avalon-MM - Manual (Page 147)

number of logical interfaces by merging them. Allowing the Quartus II software to merge reconfi‐
guration interfaces gives the Fitter more flexibility in placing transceiver channels.
Note: You cannot use SignalTap to observe the reconfiguration interfaces.
Transceiver Reconfiguration Controller Connectivity for Designs Using
CvP
If your design meets the following criteria:
• It enables CvP
• It includes an additional transceiver PHY that connect to the same Transceiver Reconfiguration
Controller
then you must connect the PCIe
refclk
signal to the
mgmt_clk_clk
signal of the Transceiver Reconfigu‐
ration Controller and the additional transceiver PHY. In addition, if your design includes more than one
Transceiver Reconfiguration Controller on the same side of the FPGA, they all must share the
mgmt_clk_clk
signal.
For more information about using the Transceiver Reconfiguration Controller, refer to the Transceiver
Reconfiguration Controller chapter in the Altera Transceiver PHY IP Core User Guide.
Related Information
Altera Transceiver PHY IP Core User Guide
UG-01105_avmm
2014.12.15
Transceiver Reconfiguration Controller Connectivity for Designs Using CvP 12-3
Transceiver PHY IP Reconfiguration Altera Corporation
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