Altera Arria V Avalon-MM - Manual (Page 13)

The design example transfers data between an on-chip memory buffer located on the Avalon-MM side
and a PCI Express memory buffer located on the root complex side. The data transfer uses the DMA
component which is programmed by the PCI Express software application running on the Root Complex
processor.
The example design also includes the Transceiver Reconfiguration Controller which allows you to
dynamically reconfigure transceiver settings. This component is necessary for high performance
transceiver designs.
Related Information
• Generating the Example Design on page 2-3
• Creating a System with Qsys
This document provides an introduction to Qsys.
Running Qsys
1. Choose Programs > Altera > Quartus II> (Windows Start menu) to run the
Quartus II software. Alternatively, you can also use the Quartus II Web Edition software.
2. On the File menu, select New, then Qsys System File.
3. Open the ep_g1x4.qsys example design.
The following figure shows a Qsys system that includes the Transceiver Reconfiguration Controller and
the Altera PCIe Reconfig Driver IP Cores. The Transceiver Reconfiguration Controller performs dynamic
reconfiguration of the analog transceiver settings to optimize signal quality. You must include these
components to the Qsys system to run successfully in hardware.
Figure 2-2: Qsys Avalon-MM Design for PCIe with Transceiver Reconfiguration Components
2-2 Running Qsys
UG-01105_avmm
2014.12.15
Altera Corporation Getting Started with the Avalon‑MM Arria V Hard IP for PCI Express
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