Table 2-7 – Digilent 6003-410-000P-KIT User Manual
Page 38
38
XUP Virtex-II Pro Development System
UG069 (v1.0) March 8, 2005
Chapter 2: Using the System
R
The connections between the FPGA and the XSGA output DAC and connector are listed in
along with the required I/O characteristics.
800 x 600 @ 75 Hz
50.00
1
2
600
1
2
23
626
800 x 600 @ 85 Hz
55.00
11
20
600
1
3
18
622
1024 x 768 @ 60 Hz
65.00
13
20
768
3
6
29
806
1024 x 768 @ 72 Hz
75.00
15
20
768
1
3
24
796
1024 x 768 @ 75 Hz
80.00
8
10
768
2
4
29
803
1024 x 768 @ 85 Hz
95.00
19
20
768
2
4
38
812
1280 x 1024 @ 60 Hz
110.00
11
10
1024
3
5
42
1074
1280 x 1024 @ 72 Hz
130.00
13
10
1024
2
4
40
1070
1280 x 1024 @ 75 Hz
135.00
27
20
1024
1
3
38
1066
1280 x 1024 @ 85 Hz
150.00
3
2
1024
1
3
28
1056
1200 x 1600 @ 60 Hz
160.00
16
10
1200
1
3
40
1244
1200 x 1600 @ 70 Hz
180.00
18
10
1200
1
3
38
1242
Table 2-6:
DCM and XSGA Controller Settings for Various XSGA Formats (Continued)
Output
Format
Pixel
Clock
DCM
Settings
Verilog Horizontal Timing Parameters
H Active
H FP
H Synch
H BP
H Total
MHz
M
D
Pixels
Pixels
Pixels
Pixels
Pixels
Table 2-7:
XSGA Output Connections
Signal
Direction
Video
DAC or Output
Connector Pin
FPGA
Pin
I/O Type
Drive
Slew
VGA_OUT_RED[0]
O
40
G8
LVTTL
8 mA
SLOW
VGA_OUT_RED[1]
O
41
H9
LVTTL
8 mA
SLOW
VGA_OUT_RED[2]
O
42
G9
LVTTL
8 mA
SLOW
VGA_OUT_RED[3]
O
43
F9
LVTTL
8 mA
SLOW
VGA_OUT_RED[4]
O
44
F10
LVTTL
8 mA
SLOW
VGA_OUT_RED[5]
O
45
D7
LVTTL
8 mA
SLOW
VGA_OUT_RED[6]
O
46
C7
LVTTL
8 mA
SLOW
VGA_OUT_RED[7]
O
47
H10
LVTTL
8 mA
SLOW
VGA_OUT_GREEN[0]
O
2
G10
LVTTL
8 mA
SLOW
VGA_OUT_GREEN[1]
O
3
E10
LVTTL
8 mA
SLOW
VGA_OUT_GREEN[2]
O
4
D10
LVTTL
8 mA
SLOW
VGA_OUT_GREEN[3]
O
5
D8
LVTTL
8 mA
SLOW
VGA_OUT_GREEN[4]
O
6
C8
LVTTL
8 mA
SLOW