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Teledyne LeCroy PeRT3 Phoenix System User Manual

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Teledyne LeCroy PeRT

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Phoenix System User Manual

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System Control Ribbon ‐ Main Tab

Teledyne LeCroy


Configuration

The Configuration panel allows the user to specify the protocol to be used during testing,
the data rate to be used for the test, whether spread spectrum clocking (SSC) is to be
used, and the signal to be applied to the "Clock Out" port located on the front panel.

Figure 6.3: Configuration Panel

Allowed values for these fields are:

Protocol:

SATA, SAS, PCI Express, USB 3.0, Custom, Generator Only or Receiver Only. Choose SATA,
SAS, PCI Express or USB 3.0 to test devices which use those protocols. Custom may be
used for custom protocols that include such things as user‐defined DUT initialization
sequences and user‐defined patterns specific to the user’s protocol, or for cables,
backplanes and other passive components. The Generator Only option is provided to
support situations where the user wishes to use the PeRT

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system as a signal generator

but is not returning any signal to the system. In this case, the system will generate a test
signal without "connecting" to any device and will not monitor the return channel. The
Receiver Only option is provided to support situations where the user wishes to verify
that the DUT transmit to the PeRT

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path is clean and bits are received without errors.

Note:

Changing the protocol selection may require loading new firmware. If so, this may take a few

minutes.

Speed:


The PeRT

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Phoenix supports multiple data rates and typical data rates for selected

protocols are displayed in the pull down menu in addition to Other, External Clock and
8Ghz from PCIe Gen3 ref clock. For example, if the PCIe protocol is selected, the typical
speeds available are 2.5Gb/sec, 5Gb/Sec and 8Gb/sec. If Other is selected, the user can
define the exact bit rate. Please refer to the specification page of the PeRT

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datasheet for

data rate range and resolution. In External Clock mode, the Phoenix generator clock is
locked to the clock frequency of Clock In. 8Ghz from PCIe Gen3 ref clock is specifically
designed to lock to the PCIe Gen3 host system reference clock through the PCIe gen3
compliance PLL settings.