Rainbow Electronics Atmega169L - Manual (Page 211)

211
ATmega169V/L
2514A–AVR–08/02
Addressing COM0 starts a frame by driving opposite phase with large amplitude out on
COM0 compared to none addressed COM lines. Non-energized segments are in phase
with the addressed COM0, and energized segments have opposite phase and large
amplitude. For waveform figures refer to “Mode of Operation” on page 211. Latched
data from LCDDR3 - LCDDR0 is multiplexed into the decoder. The decoder is controlled
from the LCD timing and sets up signals controlling the analog switches to produce an
output waveform. Next, COM1 is addressed, and latched data from LCDDR8 - LCDDR5
is input to decoder. Addressing continuous until all COM lines are addressed according
to number of common (duty). The display data are latched before a new frame start.
LCD Contrast
Controller/Power Supply The peak value (V
LCD
) on the output waveform determines the LCD Contrast. V
LCD
is
controlled by software from 2.6V to 3.35V independent of V
CC
. An internal signal inhibits
output to the LCD until V
LCD
has reached its target value.
LCDCAP An external capacitor (typical > 470 nF) must be connected to the LCDCAP pin as
shown in Figure 97. This capacitor acts as a reservoir for LCD power (V
LCD
). A large
capacitance reduces ripple on V
LCD
but increases the time until VLCD reaches its target
value.
Figure 97. LCDCAP Connection
LCD Buffer Driver Intermediate voltage levels are generated from buffers/drivers. To reduce power con-
sumption, buffers are active until output voltage levels are within ± 10 mV. Then LCD
output pins are tri-stated and buffers are switched off.
Mode of Operation
Static Duty and Bias If all segments on a LCD have one electrode common, then each segment must have a
unique terminal.
This kind of display is driven with the waveform shown in Figure 98. SEG0 - COM0 is
the voltage across a segment that is on, and SEG1 - COM0 is the voltage across a seg-
ment that is off.
3 2 1
64
63
62
LCDCAP