Rainbow Electronics Atmega169L - Manual (Page 123)

123
ATmega169V/L
2514A–AVR–08/02
8-bit Timer/Counter2
with PWM and
Asynchronous
Operation
Timer/Counter2 is a general purpose, single channel, 8-bit Timer/Counter module. The
main features are:
•
Single Channel Counter
• Clear Timer on Compare Match (Auto Reload)
• Glitch-free, Phase Correct Pulse Width Modulator (PWM)
• Frequency Generator
• 10-bit Clock Prescaler
• Overflow and Compare Match Interrupt Sources (TOV2 and OCF2A)
• Allows Clocking from External 32 kHz Watch Crystal Independent of the I/O Clock
Overview A simplified block diagram of the 8-bit Timer/Counter is shown in Figure 52. For the
actual placement of I/O pins, refer to “Pinout ATmega169” on page 2. CPU accessible
I/O Registers, including I/O bits and I/O pins, are shown in bold. The device-specific I/O
Register and bit locations are listed in the “8-bit Timer/Counter Register Description” on
page 134.
Figure 52. 8-bit Timer/Counter Block Diagram
Registers The Timer/Counter (TCNT2) and Output Compare Register (OCR2A) are 8-bit registers.
Interrupt request (shorten as Int.Req.) signals are all visible in the Timer Interrupt Flag
Register (TIFR2). All interrupts are individually masked with the Timer Interrupt Mask
Register (TIMSK2). TIFR2 and TIMSK2 are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or asynchronously
clocked from the TOSC1/2 pins, as detailed later in this section. The asynchronous
operation is controlled by the Asynchronous Status Register (ASSR). The Clock Select
logic block controls which clock source the Timer/Counter uses to increment (or decre-
Timer/Counter
D
ATA
B
U
S
=
TCNTn
Waveform
Generation
OCnx
= 0
Control Logic
= 0xFF
TOP BOTTOM
count
clear
direction
TOVn
(Int.Req.)
OCnx
(Int.Req.)
Synchronization Unit
OCRnx
TCCRnx
ASSRn
Status flags
clk
I/O
clk
ASY
Synchronized Status flags
asynchronous mode
select (ASn)
TOSC1
T/C
Oscillator
TOSC2
Prescaler
clk
Tn
clk
I/O