Rainbow Electronics Atmega169L - Manual (Page 140)

140
ATmega169V/L
2514A–AVR–08/02
Timer/Counter2 Interrupt Flag
Register – TIFR2
• Bit 1 – OCF2A: Output Compare Flag 2 A
The OCF2A bit is set (one) when a compare match occurs between the Timer/Counter2
and the data in OCR2A – Output Compare Register2. OCF2A is cleared by hardware
when executing the corresponding interrupt handling vector. Alternatively, OCF2A is
c l ea re d b y wr i tin g a l o g ic o n e to th e fl ag . Wh e n th e I-b i t i n S RE G , O C IE2
(Timer/Counter2 Compare match Interrupt Enable), and OCF2A are set (one), the
Timer/Counter2 Compare match Interrupt is executed.
• Bit 0 – TOV2: Timer/Counter2 Overflow Flag
The TOV2 bit is set (one) when an overflow occurs in Timer/Counter2. TOV2 is cleared
by hardware when executing the corresponding interrupt handling vector. Alternatively,
TOV2 is cleared by writing a logic one to the flag. When the SREG I-bit, TOIE2A
( T im er /Co u nte r2 O v er flo w In ter ru p t En ab l e ), a n d TO V 2 ar e se t (o n e) , th e
Timer/Counter2 Overflow interrupt is executed. In PWM mode, this bit is set when
Timer/Counter2 changes counting direction at 0x00.
Bit 7 6 5 4 3 2 1 0
– – – – – – OCF2A TOV2 TIFR2
Read/Write R R R R R R R/W R/W
Initial Value 0 0 0 0 0 0 0 0