Texas Instruments TMS320C645X User Manual
Page 56
www.ti.com
SRIO Functional Description
•
This value is compared against the port written value in the TX DMA State CP register, if equal, the
interrupt is deasserted.
Initialization Example
SRIO_REGS->Queue0_RXDMA_HDP
= 0 ;
SRIO_REGS->Queue1_RXDMA_HDP
= 0 ;
SRIO_REGS->Queue2_RXDMA_HDP
= 0 ;
SRIO_REGS->Queue3_RXDMA_HDP
= 0 ;
SRIO_REGS->Queue4_RXDMA_HDP
= 0 ;
SRIO_REGS->Queue5_RXDMA_HDP
= 0 ;
SRIO_REGS->Queue6_RXDMA_HDP
= 0 ;
SRIO_REGS->Queue7_RXDMA_HDP
= 0 ;
SRIO_REGS->Queue8_RXDMA_HDP
= 0 ;
SRIO_REGS->Queue9_RXDMA_HDP
= 0 ;
SRIO_REGS->Queue10_RXDMA_HDP
= 0 ;
SRIO_REGS->Queue11_RXDMA_HDP
= 0 ;
SRIO_REGS->Queue12_RXDMA_HDP
= 0 ;
SRIO_REGS->Queue13_RXDMA_HDP
= 0 ;
SRIO_REGS->Queue14_RXDMA_HDP
= 0 ;
SRIO_REGS->Queue15_RXDMA_HDP
= 0 ;
Queue Mapping
SRIO_REGS->RXU_MAP01_L = CSL_FMK( SRIO_RXU_MAP01_L_LETTER_MASK, 3)|
CSL_FMK( SRIO_RXU_MAP01_L_MAILBOX_MASK, 0x3F)|
CSL_FMK( SRIO_RXU_MAP01_L_LETTER, 0)|
CSL_FMK( SRIO_RXU_MAP01_L_MAILBOX, 1)|
CSL_FMK( SRIO_RXU_MAP01_L_SOURCEID, 0xBEEF);
SRIO_REGS->RXU_MAP01_H = CSL_FMK( SRIO_RXU_MAP01_H_TT, 1)|
CSL_FMK( SRIO_RXU_MAP01_H_QUEUE_ID, 0)|
CSL_FMK( SRIO_RXU_MAP01_H_PROMISCUOUS, 1)|
CSL_FMK( SRIO_RXU_MAP01_H_SEGMENT_MAPPING, 1);
RX Buffer Descriptor
RX_DESCP0_0->RXDESC0 = CSL_FMK( SRIO_RXDESC0_N_POINTER,(int )RX_DESCP0_1 );
//link to RX_DESCP0_1
//poll mode, extended address type 2,5,6
RX_DESCP0_0->RXDESC1 = CSL_FMK( SRIO_RXDESC1_B_POINTER,(int )&rcvBuff1[0] );
//32bit = type 2,5,6. 24bit = type 8
RX_DESCP0_0->RXDESC2 = CSL_FMK( SRIO_RXDESC2_SRC_ID, 0xBEEF)|
CSL_FMK( SRIO_RXDESC2_PRI, 1)|
CSL_FMK( SRIO_RXDESC2_TT, 1)|
CSL_FMK( SRIO_RXDESC2_MAILBOX, 0);
RX_DESCP0_0->RXDESC3 = CSL_FMK( SRIO_RXDESC3_SOP,1 )|
CSL_FMK( SRIO_RXDESC3_EOP,1 )|
CSL_FMK( SRIO_RXDESC3_OWNERSHIP,1 )|
CSL_FMK( SRIO_RXDESC3_EOQ,1 )|
CSL_FMK( SRIO_RXDESC3_TEARDOWN,0 )|
CSL_FMK( SRIO_RXDESC3_CC,0 )|
CSL_FMK(SRIO_RXDESC3_MESSAGE_LENGTH,MLEN_512DW);
RX_DESCP0_1->RXDESC0 = CSL_FMK( SRIO_RXDESC0_N_POINTER, 0);
//end of message
//poll mode, extended address type 2,5,6
RX_DESCP0_1->RXDESC1 = CSL_FMK( SRIO_RXDESC1_B_POINTER,(int )&rcvBuff2[0] );
//32bit = type 2,5,6. 24bit = type 8
RX_DESCP0_1->RXDESC2 = CSL_FMK( SRIO_RXDESC2_SRC_ID, 0xBEEF)|
CSL_FMK( SRIO_RXDESC2_PRI, 1)|
CSL_FMK( SRIO_RXDESC2_TT, 1)|
CSL_FMK( SRIO_RXDESC2_MAILBOX, 1);
RX_DESCP0_1->RXDESC3 = CSL_FMK( SRIO_RXDESC3_SOP,1 )|
CSL_FMK( SRIO_RXDESC3_EOP,1 )|
CSL_FMK( SRIO_RXDESC3_OWNERSHIP,1 )|
CSL_FMK( SRIO_RXDESC3_EOQ,1 )|
CSL_FMK( SRIO_RXDESC3_TEARDOWN,0 )|
CSL_FMK( SRIO_RXDESC3_CC,0 )|
CSL_FMK( SRIO_RXDESC3_MESSAGE_LENGTH,MLEN_512DW );
56
Serial RapidIO (SRIO)
SPRU976 – March 2006