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Packet, Srio functional description – Texas Instruments TMS320C645X User Manual

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Mailbox 1...64

from RapidIO Packet

Header - Received on any

input port

Mailbox Mapper

Q15

Q2

Q1

Q0

Queue assignable to any core

Packet Sequence

Message

n

A

Packet

Manager

n+1

B

n+2

B

n+3

C

n+4

D

n+5

B

n+6

E

Buffer Descriptor

Queues:

Descriptor per Message

All Priorities

Dedicated Single Segment

Message Descriptor Queue

A

C

E

D

null

null

B

Multi-Segment Message

Descriptor Queue

Multi-Segment Message

Descriptor Queue N

L2 Memory

Data Buffer up to 256B

n Data Packet

n+3 Data Packet

n+4 Data Packet

n+6 Data Packet

256B Free Buffer

L2 Memory

Data Buffer up to 4K

n+5 Data Packet

n+2 Data Packet

n+1 Data Packet

4KB Free Buffer

acklD

rsv

prio

tt

ftype

ftype = 1011

destID sourcelD msglen

ssize

msgseg/xmbox double-word 0 double-word 1

...

double-word n-2

double-word n-1

CRC

PHY

LOG

TRA

LOG

TRA

PHY

5

3

2

2

4

8

8

4

4

4

64

64

(n-4)*64

64

64

16

16

n*64+16

16

4

2

10

n*64+64

letter

2

mbox

2

SRIO Functional Description

2.3.4.1

RX Operation

As message packets are received by the RapidIO ports, the data must be written into memory while
maintaining accurate state information that is needed for future processing. For instance, if a message
spans multiple packets, information must be saved that allows re-assembly of those packets by the CPU.
The CPPI module provides a scheme for tracking single and multi-packet messages, linking messages in
queues, and generating interrupts.

Figure 14

illustrates the scheme.

Figure 14. CPPI RX Scheme for RapidIO

Messages addressed to any of the 64 mailbox locations can be received on any of the RapidIO ports
simultaneously. Packets are handled sequentially in order of receipt. The function of the mailbox mapper
block is to direct the inbound messages to the appropriate queue and finally to the correct core. The
queue mapping is programmable and must be configured after device reset. RapidIO originally supported
only 4 mailboxes with 4 letters/mailbox. Letters allow concurrent message traffic between sender and
receiver. However, for messages that consist of only single packets, the unused 4-bit packet field normally
indicating the message segment extends the available number of mailboxes.

Figure 15

shows the packet

header fields for message requests.

Figure 15. Message Request Packet

SPRU976 – March 2006

Serial RapidIO (SRIO)

41

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