Texas Instruments TMS320C645X - Manual (Page 188)

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5.85 Port Control CSR n (SPn_CTL)
SRIO Registers
Each of the four ports is supported by a register of this type.
Figure 141. Port Control CSR n (SPn_CTL)
31-30 29-27 26-24 23 22 21 20 19 18-16
PORT_WIDTH INITIALIZED_PORT_WI PORT_WIDTH_OVERRI PORT OUTP INPUT ERRO MULTI Reserved
DTH DE _DISA UT_P _POR R_CH CAST
BLE ORT_ T_EN ECK_ _PAR
ENAB ABLE DISAB TICIP
LE LE ANT
R-0x01 R-0x00 RW-0x00 RW- RW- RW- RW- RW- R-0x00
0x00 0x00 0x00 0x00 0x00
LEGEND: R = Read only; -n = value after reset
15-4 3 2 1 0
Reserved STOP DROP PORT PORT
_POR _PAC _LOC _TYPE
T_FLD KET_E KOUT
_ENC NABL
_ENA E
BLE
R-0x00 RW- RW- RW- R-
0x00 0x00 0x00 0x01
LEGEND: R = Read only; -n = value after reset
Table 115. Port Control CSR n (SPn_CTL) Field Descriptions
Bit Field Value Description
31-30 PORT_WIDTH Hardware width of the port (read only). Only 00b is valid for SP1, SP2, and SP3
00b Single-lane port
01b Four-lane port
10b-11b Reserved
29-27 INITIALIZED_PO Width of the ports after initialized (read only)
RT_WIDTH
000b Single-lane port, lane 0
001b Single-lane port, lane 2
010b Four-lane port
011b- Reserved
111b
26-24 PORT_WIDTH_O Soft port configuration to override the hardware size
VERRIDE
000b No override
001b Reserved
010b Force single lane, lane 0
011b Force single lane, lane 2
100b- Reserved
111b
23 PORT_DISABLE Port disable
0b Port receivers/drivers are enabled
1b Port receivers/drivers are disabled and are unable to receive/transmit to any packets or control
symbols
22 OUTPUT_PORT_ Output port enable
ENABLE
0b Port is stopped and not enabled to issue any packets except to route or respond to I/O logical
MAINTENANCE packets, depending upon the functionality of the processing element. Control
symbols are not affected and are sent normally.
1b Port is enabled to issue any packets
188 Serial RapidIO (SRIO) SPRU976 – March 2006
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