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Texas Instruments TMS320C645X User Manual

Page 11

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50

TX CPPI Interrupt Status Register (TX_CPPI_ICSR) Field Descriptions

.........................................

121

51

TX CPPI Interrupt Clear Register (TX_CPPI_ICCR) Field Descriptions

..........................................

122

52

LSU Status Interrupt Register (LSU_ICSR) Field Descriptions

.....................................................

123

53

LSU Clear Interrupt Register (LSU _ICCR) Field Descriptions

.....................................................

124

54

Error, Reset, and Special Event Status Interrupt Register (ERR_RST_EVNT_ICSR) Field Descriptions

....

125

55

Error, Reset, and Special Event Clear Interrupt Register (ERR_RST_EVNT_ICCR) Field Descriptions

.....

126

56

DOORBELLn Interrupt Condition Routing Register (DOORBELLn_ICRR) Field Descriptions

.................

127

57

DOORBELLn Interrupt Condition Routing Register 2 (DOORBELLn_ICRR2) Field Descriptions

.............

128

58

RX CPPI Interrupt Condition Routing Register (RX_CPPI _ICRR) Field Descriptions

..........................

129

59

RX CPPI Interrupt Condition Routing Register (RX_CPPI _ICRR2) Field Descriptions

.........................

130

60

TX CPPI Interrupt Condition Routing Register (TX_CPPI _ICRR) Field Descriptions

...........................

131

61

TX CPPI Interrupt Condition Routing Register (TX_CPPI _ICRR2) Field Descriptions

.........................

132

62

LSU Module Interrupt Condition Routing Register 0 (LSU_ICRR0) Field Descriptions

.........................

133

63

LSU Module Interrupt Condition Routing Register 1 (LSU_ICRR1) Field Descriptions

.........................

134

64

LSU Module Interrupt Condition Routing Register 2 (LSU_ICRR2) Field Descriptions

.........................

135

65

LSU Module Interrupt Condition Routing Register 3 (LSU_ICRR3) Field Descriptions

.........................

136

66

Error, Reset, and Special Event Interrupt Condition Routing Register (ERR_RST_EVNT_ICRR) Field
Descriptions

...............................................................................................................

137

67

Error, Reset, and Special Event Interrupt Condition Routing Register 2 (ERR_RST_EVNT_ICRR2) Field
Descriptions

...............................................................................................................

138

68

Error, Reset, and Special Event Interrupt Condition Routing Register 3 (ERR_RST_EVNT_ICRR3) Field
Descriptions

...............................................................................................................

139

69

INTDSTn Interrupt Status Decode Registers (INTDSTn_DECODE) Field Descriptions

........................

140

70

INTDSTn Interrupt Rate Control Registers (INTDSTn_RATE_CNTL) Field Descriptions

.......................

141

71

LSUn Control Register 0 (LSUn_REG0) Field Descriptions

........................................................

142

72

LSUn Control Register 1 (LSUn_REG1) Field Descriptions

........................................................

143

73

LSUn Control Register 2 (LSUn_REG2) Field Descriptions

........................................................

144

74

LSUn Control Register 3 (LSUn_REG3) Field Descriptions

........................................................

145

75

LSUn Control Register 4 (LSUn_REG4) Field Descriptions

........................................................

146

76

LSUn Control Register 5 (LSUn_REG5) Field Descriptions

........................................................

147

77

LSUn Control Register 6 (LSUn_REG6) Field Descriptions

........................................................

148

78

LSU Congestion Control Flow Mask n (LSU_FLOW_MASKS n) Field Descriptions

............................

149

79

Queue Transmit DMA Head Descriptor Pointer Registers (QUEUEn_TXDMA_HDP) Field Descriptions

....

150

80

Queue Transmit DMA Completion Pointer Registers (QUEUEn_TXDMA_CP) Field Descriptions

............

151

81

Queue Receive DMA Head Descriptor Pointer Registers (QUEUEn_RXDMA_HDP) Field Descriptions

....

152

82

Queue Receive DMA Completion Pointer Registers (QUEUEn_RXDMA_CP) Field Descriptions

............

153

83

Transmit Queue Teardown Register (TX_QUEUE_TEAR_DOWN) Field Descriptions

.........................

154

84

Transmit CPPI Supported Flow Mask Registers n (TX_CPPI_FLOW_MASKSn) Field Descriptions

.........

156

85

Receive Queue Teardown Register (RX_QUEUE_TEAR_DOWN) Field Descriptions

.........................

157

86

Receive CPPI Control Register (RX_CPPI_CNTL) Field Descriptions

............................................

158

87

Transmit CPPI Weighted Round Robin Control Register 0 (TX_QUEUE_CNTL0) Field Descriptions

........

159

88

Transmit CPPI Weighted Round Robin Control Register 1 (TX_QUEUE_CNTL1) Field Descriptions

........

160

89

Transmit CPPI Weighted Round Robin Control Register 2 (TX_QUEUE_CNTL2) Field Descriptions

........

161

90

Transmit CPPI Weighted Round Robin Control Register 3 (TX_QUEUE_CNTL3) Field Descriptions

........

162

91

Mailbox-to-Queue Mapping Register Ln (RXU_MAP_Ln) Field Descriptions

.....................................

163

92

Mailbox-to-Queue Mapping Register Hn (RXU_MAP_Hn) Field Descriptions

....................................

164

93

Flow Control Table Entry Registers (FLOW_CNTLn) Field Descriptions

.........................................

165

94

Device Identity CAR (DEV_ID) Field Descriptions

...................................................................

166

95

Device Information CAR (DEV_INFO) Field Descriptions

...........................................................

167

96

Assembly Identity CAR (ASBLY_ID) Field Descriptions

.............................................................

168

97

Assembly Information CAR (ASBLY_INFO) Field Descriptions

....................................................

169

98

Processing Element Features CAR (PE_FEAT) Field Descriptions

...............................................

170

SPRU976 – March 2006

List of Tables

11

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