Texas Instruments TMS320C645X - Manual (Page 126)

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5.25 Error, Reset, and Special Event Clear Interrupt Register (ERR_RST_EVNT_ICCR)
SRIO Registers
Figure 81. Error, Reset, and Special Event Clear Interrupt Register (ERR_RST_EVNT_ICCR)
31-17 16
Reserved ICC16
R-0x00 W-
0x00
LEGEND: R = Read only; -n = value after reset
15-12 11 10 9 8 7-3 2 1 0
Reserved ICC11 ICC10 ICC9 ICC8 Reserved ICC2 ICC1 ICC0
R-0x00 W- W- W- W- R-0x00 W- W- W-
0x00 0x00 0x00 0x00 0x00 0x00 0x00
LEGEND: R = Read only; -n = value after reset
Table 55. Error, Reset, and Special Event Clear Interrupt Register (ERR_RST_EVNT_ICCR) Field
Descriptions
Bit Field Value Description
31-17 Reserved Reserved
16 ICC16 Device Reset Interrupt from any port
15-12 Reserved Reserved
11 ICC11 Port3 Error
10 ICC10 Port2 Error
9 ICC9 Port1 Error
8 ICC8 Port0 Error
7-3 Reserved Reserved
2 ICC2 Logical Layer Error Management Event Capture
1 ICC1 Port-write-in request received on any port
0 ICC0 Multi-cast event control symbol interrupt received on any port
Serial RapidIO (SRIO) 126 SPRU976 – March 2006
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