Lsu_icrr0), Section 5.32 – Texas Instruments TMS320C645X User Manual
Page 133
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5.32
LSU Module Interrupt Condition Routing Register 0 (LSU_ICRR0)
SRIO Registers
Figure 88. LSU Module Interrupt Condition Routing Register 0 (LSU_ICRR0)
31
28
27
24
23
20
19
16
ICR7
ICR6
ICR5
ICR4
R/W-0000
R/W-0000
R/W-0000
R/W-0000
15
12
11
8
7
4
3
0
ICR3
ICR2
ICR1
ICR0
R/W-0000
R/W-0000
R/W-0000
R/W-0000
LEGEND: R = Read, W = Write, n = value at reset
Table 62. LSU Module Interrupt Condition Routing Register 0 (LSU_ICRR0) Field Descriptions
Bit
Field
Value
Description
31-0
ICR (7-0)
Load/Store module interrupt condition routing bits
SPRU976 – March 2006
Serial RapidIO (SRIO)
133