Texas Instruments TMS320C645X - Manual (Page 104)

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5.5 Peripheral Global Enable Register (GBL_EN)
SRIO Registers
Figure 61. Peripheral Global Enable Register (GBL_EN)
31-16
Reserved
R-0x00
LEGEND: R = Read only; -n = value after reset
15-1 0
Reserved EN
R-0x00 RW-
0x00
LEGEND: R = Read only; -n = value after reset
Table 32. Peripheral Global Enable Register (GBL_EN) Field Descriptions
Bit Field Value Description
31-1 Reserved Reserved
0 EN Controls reset to all clock domains within the peripheral
0b Peripheral to be disabled (held in reset, clocks disabled)
1b Peripheral to be enabled
Serial RapidIO (SRIO) 104 SPRU976 – March 2006
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