Lm_resp), Descriptions, Section 5.82 – Texas Instruments TMS320C645X User Manual
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5.82
Port Link Maintenance Response CSR n (SPn_LM_RESP)
SRIO Registers
Each of the four ports is supported by a register of this type.
Figure 138. Port Link Maintenance Response CSR n (SPn_LM_RESP)
31
30-16
RESP
Reserved
ONSE
_VALI
D
R-
R-0x00
0x00
LEGEND: R = Read only; -n = value after reset
15-10
9-5
4-0
Reserved
ACKID_STATUS
LINK_STATUS
R-0x00
R-0x00
R-0x00
LEGEND: R = Read only; -n = value after reset
Table 112. Port Link Maintenance Response CSR n (SPn_LM_RESP) Field Descriptions
Bit
Field
Value
Description
31
RESPONSE_VAL
If the link-request causes a link-response, this bit indicates that the link-response has been
ID
received and the status fields are valid. If the link-request does not cause a link-response, this bit
indicates that the link-request has been transmitted. This bit automatically clears on read.
30-10
Reserved
Reserved
9-5
ACKID_STATUS
AckID status field from the link-response control symbol
4-0
LINK_STATUS
Link status field from the link-response control symbol
Serial RapidIO (SRIO)
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SPRU976 – March 2006