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Texas Instruments TMS320C645X User Manual

Page 103

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SRIO Registers

Table 31. Peripheral Settings Control Register (PER_SET_CNTL) Field Descriptions (continued)

Bit

Field

Value

Description

2

ENPLL3

Drives SERDES Macro 3 PLL Enable signal

0b

Disables macro 3 PLL

1b

Enables macro 3 PLL

1

ENPLL2

Drives SERDES Macro 2 PLL Enable signal

0b

Disables macro 2 PLL

1b

Enables macro 2 PLL

0

ENPLL1

Drives SERDES Macro 1 PLL Enable signal

0b

Disables macro 1 PLL

1b

Enables macro 1 PLL

SPRU976 – March 2006

Serial RapidIO (SRIO)

103

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