Texas Instruments TMS320C645X - Manual (Page 148)

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5.47 LSUn Control Register 6 (LSUn_REG6)
SRIO Registers
There are four of these registers, one for each LSU.
Figure 103. LSUn Control Register 6 (LSUn_REG6)
31-16
Reserved
R-0x00
LEGEND: R = Read only; -n = value after reset
15-5 4-1 0
Reserved COMPLETION_CODE BSY
R-0x00 R-0x00 R-
0x00
LEGEND: R = Read only; -n = value after reset
Table 77. LSUn Control Register 6 (LSUn_REG6) Field Descriptions
Bit Field Value Description
31-5 Reserved Reserved
4-1 COMPLETION_C Indicates the status of the pending command.
ODE
000b Transaction complete, No Errors (Posted/Non-posted)
001b Transaction Timeout occurred on Non-posted transaction
010 b Transaction complete, Packet not sent due to flow control blockade (Xoff)
011b Transaction complete, Non-posted response packet (type 8 and 13) contained ERROR status, or
response payload length was in error
100b Transaction complete, Packet not sent due to unsupported transaction type or invalid programming
encoding for one or more LSU register fields
101b DMA data transfer error
110b "Retry" DOORBELL response received, or Atomic Test-and-swap was not allowed (semaphore in
use)
111b Transaction complete, Packet not sent due to unavailable outbound credit at given priority
0 BSY Indicates status of the command registers.
0b Command registers are available(writable) for next set of transfer descriptors
1b Command registers are busy with current transfer
Serial RapidIO (SRIO) 148 SPRU976 – March 2006
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