FUJITSU Implementation Supplement Fujitsu SPARC64 V - Manual (Page 97)

86 SPARC JPS1 Implementation Supplement: Fujitsu SPARC64 V • Release 1.0, 1 July 2002
The micro-TLBs are coherent to main TLBs and are not visible to software, with
the exception of TLB multiple hit detection. Hardware maintains the consistency
between micro-TLBs and main TLBs.
No other details on micro-TLB are provided because software cannot execute
direct operations to micro-TLB and its configuration is invisible to software.
IMPL. DEP. #223 : Whether TLB multiple-hit detections are supported in JPS1 is
implementation dependent.
On SPARC64 V, TLB multiple hit detection is supported. However, the multiple
hit is not detected at every TLB reference. When the micro-TLB (uTLB), which is
the cache of sTLB and fTLB, matches the virtual address, the multiple hit in sTLB
and fTLB is not detected. The multiple hit is detected only when the micro-TLB
mismatches and main TLB is referenced.
F.2 Translation Table Entry (TTE)
IMPL DEP. in Commonality TABLE F-1: TTE_Data bits 46–43 are implementation
dependent.
On SPARC64 V, TTE_Data bits 46:43 are reserved.
IMPL. DEP. #224 : Physical address width support by the MMU is implementation
dependent in JPS1; minimum PA width is 43 bits.
The SPARC64 V MMU implements 43-bit physical addresses. The PA field of the
TTE holds a 43-bit physical address. The MMU translates virtual addresses into
43-bit physical addresses. Each cache tag holds bits 42:6 of physical addresses.
Bits 46:43 of each TTE always read as 0 and writes to them are ignored.
A cacheable access for a physical address
≥
400 0000 0000
16
always causes the
cache miss for the U2 cache and generates a UPA request for the cacheable access.
The urgent error
ASI_UGESR.SDC is signalled after the UPA cacheable access is
requested.
TABLE F-1 Organization of SPARC64 V TLBs
Feature sITLB and sDTLB fITLB and fDTLB
Entries 2048 32
Associativity 2-way set associative Fully associative
Page size supported 8 KB/4MB 8 KB/64 KB/512 KB/4 MB
Locked translation entry Not supported Supported
Unlocked translation entry Supported Supported