FUJITSU Implementation Supplement Fujitsu SPARC64 V - Manual (Page 188)

Release 1.0, 1 July 2002 F. Chapter P Error Handling 177
P.7.2 ASI_ASYNC_FAULT_ADDR_D1
TABLE P-16 describes the fields of the ASI_ASYNC_FAULT_ADDR_D1 register.
[1] Register name: ASI_ASYNC_FAULT_ADDR_D1 ( ASI_AFAR_D1 )
[2] ASI: 4D
16
[3] VA: 00
16
[4] Error checking: Parity
[5] Format & function: See TABLE P-16 .
[6] Initial value at reset: Hard POR: All fields in ASI_AFAR_D1 are set to 0.
Other reset: Value in ASI_AFAR_D1 is unchanged.
[7] Update: When a new restrainable error is detected, ASI_AFAR_D1 is
updated as defined in Section P.7.1 in the notes on the AFSR
Prio_D1 column of TABLE P-15 .
When program writes to ASI_AFAR_D1 , all fields in
ASI_AFAR_D1 are set to 0 and validated.
[8] Software access ldxa [%g0]ASI_AFAR_D1 , %r N
stxa %g0 , [%g0]ASI_AFAR_D1
TABLE P-16 ASI_ASYNC_FAULT_ADDR_D1 ( ASI_AFAR_D1 ) Bit Description
Bit Name R/W Description
63:56 CONTENTS R Contents of ASI_AFAR_D1 . This field has the following two functions:
• Indicates the type of error held in the other fields of ASI_AFAR_D1 as
defined in TABLE P-15 .
• Controls the recording of newly detected restrainable errors. Upon
detection of a new restrainable error recordable in ASI_AFAR_D1 , if the
current ASI_AFAR_D1.CONTENTS < the AFSR Prio_D1 value of the new
error, the new error is recorded into ASI_AFAR_D1 . If the current
ASI_AFAR_D1.CONTENTS
≥
the AFSR Prio_D1 value of the new error, the
error is not recorded into ASI_AFAR_D1 and ASI_AFAR_D1 is unchanged.
55 WAY R D1 cache way with the error. Indicates the D1 cache way number (0 or 1) in
which the error is detected.
50:48 VA_BIT15_13 R I ndicates the virtual address bits 15:13 contained in the D1 cache index of the
cache line that caused the error. Because the D1 cache is a VIPT cache, the D1
cache index contains the virtual address bits 15:13.
42:6 PA_BIT42_6 R Indicates the physical address bits 42:6 for the D1 cache line that caused the
error.
Others Reserved R Always reads as 0.
All W Any write access sets all fields in this register to 0. That is, when a program
writes to
ASI_AFAR_D1 , the entire ASI_AFAR_D1 is set to 0 regardless of the
write value; the error in ASI_AFAR_D1 is expunged.