FUJITSU Implementation Supplement Fujitsu SPARC64 V - Manual (Page 174)

Release 1.0, 1 July 2002 F. Chapter P Error Handling 163
P.3 Fatal Error and error_state
Transition Error
P.3.1 ASI_STCHG_ERROR_INFO
The ASI_STCHG_ERROR_INFO register stores detected FATAL error and
error_state transition error information, for access by OBP (Open Boot PROM)
software.
TABLE P-10 describes the fields in the ASI_STCHG_ERROR_INFO register.
[1] Register name: ASI_STCHG_ERROR_INFO
[2] ASI: 4C
16
[3] VA: 18
16
[4] Error checking: None
[5] Format & function: See TABLE P-10
[6] Initial value at reset: Hard POR: All fields are set to 0.
Other resets: Values are unchanged.
[7] Update policy: Upon detection of each related error, the corresponding bit in
ASI_STCHG_ERROR_INFO is set to 1. Writing 1 to bit 0 erases all
error indications in ASI_STCHG_ERROR_INFO (sets all bits in
the register, including bit 0, to 0).
TABLE P-10 Format of ASI_STCHG_ERROR_INFO Bit Description
Bit Name RW Description
63:34 Reserved R Always 0.
33 ECR_WEAK_ED R ASI_ERROR_CONTROL.WEAK_ED is copied into this
field at the beginning of a POR or watchdog reset.
32 ECR_UGE_HANDLER R ASI_ERROR_CONTROL.UGE_HANDLER is copied into
this field at the beginning of the POR or watchdog
reset.
31:15 Reserved R Always 0.
14 Always 0 ( EE_OTHER ) R In the ideal case, EE_OTHER would be assigned in this
bit, but the field is not implemented in SPARC64 V.
13 EE_TRAP_ADDR_UNCORRECTED_ERROR R Upon detection of the corresponding error, set to 1.
12 EE_OPSR R Upon detection of the corresponding error, set to 1.
11 EE_WATCH_DOG_TIMEOUT_IN_MAXTL R Upon detection of the corresponding error, set to 1.
10 EE_SECOND_WATCH_DOG_TIMEOUT R Upon detection of the corresponding error, set to 1.