P.5 instruction access errors, P.6 data access errors – FUJITSU Implementation Supplement Fujitsu SPARC64 V User Manual
Page 184

Release 1.0, 1 July 2002
F. Chapter P
Error Handling
173
causes the data_access_error trap when its tag matches at the DTLB
reference for address translation. */
}
if (ASI_UGESR.IUG_ITLB == 1) {
execute demap_all for ITLB;
/* A locked fITLB entry with uncorrectable error is not removed by this
operation. A locked fITLB entry with UE never detects its tag match
or causes the data access error trap when its tag matches at the ITLB
reference for address translation. */
}
if ((ASI_UGESR.bits22:14 == 0) &&
((ASI_UGESR.INSTEND == 0) || (ASI_UGESR.INSTEND == 1))) {
++ADE_trap_retry_per_unit_of_time;
if (ADE_trap_retry_per_unit_of_time < threshold)
resume the trapped context by use of the RETRY instruction;
else
invoke panic routine because of too many ADE trap retries;
}
else if ((ASI_UGESR.bits22:18 == 0) &&
(ASI_UGESR.bits15:14 == 0) &&
(ASI_UGESR.PRIV == 0)) {
++ADE_trap_kill_user_per_unit_of_time;
if (ADE_trap_kill_user_per_unit_of_time < threshold)
kill one user process trapped and continue system operation;
else
invoke panic routine because of too may ADE trap user kill;
}
else
invoke panic routine because of unrecoverable urgent error;
}
P.5
Instruction Access Errors
See Appendix F, Memory Management Unit, for details.
P.6
Data Access Errors
See Appendix F, Memory Management Unit, for details.