FUJITSU Implementation Supplement Fujitsu SPARC64 V - Manual (Page 6)

Release 1.0, 1 July 2002 F. Chapter Contents iii
SPARC JPS1 Implementation-Dependent Traps 39
8. Memory Models 41
Overview 42
SPARC V9 Memory Model 42
Mode Control 42
Synchronizing Instruction and Data Memory 42
A. Instruction Definitions: SPARC64 V Extensions 45
Block Load and Store Instructions (VIS I) 47
Call and Link 49
Implementation-Dependent Instructions 49
Floating-Point Multiply-Add/Subtract 50
Jump and Link 53
Load Quadword, Atomic [Physical] 54
Memory Barrier 55
Partial Store (VIS I) 57
Prefetch Data 57
Read State Register 58
SHUTDOWN (VIS I) 58
Write State Register 59
Deprecated Instructions 59
Store Barrier 59
B. IEEE Std 754-1985 Requirements for SPARC V9 61
Traps Inhibiting Results 61
Floating-Point Nonstandard Mode 61
fp_exception_other Exception (ftt=unfinished_FPop) 62
Operation Under FSR.NS = 1 65
C. Implementation Dependencies 69
Definition of an Implementation Dependency 69
Hardware Characteristics 70
Implementation Dependency Categories 70
List of Implementation Dependencies 70