FUJITSU Implementation Supplement Fujitsu SPARC64 V User Manual
Page 177
166
SPARC JPS1 Implementation Supplement: Fujitsu SPARC64 V • Release 1.0, 1 July 2002
22
IAUG_CRE
R
Uncorrectable error in any of the following:
(IA)
ASI_EIDR
(IA)
ASI_PA_WATCH_POINT
when enabled
(IA)
ASI_VA_WATCH_POINT
when enabled
(I)
ASI_AFAR_D1
(I)
ASI_AFAR_U2
(I)
ASI_INTR_R
(SPARC64 V deviation from the ideal specification: the
uncorrectable error in
ASI_INTR_R
at load instruction access is
detected but reported as
ASI_UGESR.COREERR
instead of
ASI_UGESR.IAUG_CRE
; the reported
ASI_UGESR.COREERR
error is not
erased by instruction retry)
(A)
ASI_INTR_DISPATCH_W
(
UE
at store)
(IA)
ASI_PARALLEL_BARRIER
containing the barrier variable transmission
interface error (SPARC64 V deviation from the ideal specification; the
uncorrectable error in the barrier is detected but reported as
ASI_UGESR.COREERR
instead of
ASI_UGESR.IAUG_CRE
; the reported
ASI_UGESR.COREERR
error is not erased by instruction retry)
(IA)
SOFTINT
(IA)
STICK
(IA)
STICK_COMP
21
IAUG_TSBCTXT
R
Uncorrectable error in any of the following:
(IA)
ASI_DMMU_TSB_BASE
(IA)
ASI_DMMU_TSB_PEXT
(IA)
ASI_DMMU_TSB_SEXT
(IA)
ASI_DMMU_TSB_NEXT
(IA)
ASI_PRIMARY_CONTEXT
(IA)
ASI_SECONDARY_CONTEXT
(IA)
ASI_IMMU_TSB_BASE
(IA)
ASI_IMMU_TSB_PEXT
(IA)
ASI_IMMU_TSB_SEXT
20
IUG_TSBP
R
Uncorrectable error in any of the following:
(I)
ASI_DMMU_TAG_TARGET
(I)
ASI_DMMU_TAG_ACCESS
(I)
ASI_DMMU_TSB_8KB_PTR
(I)
ASI_DMMU_TSB_64KB_PTR
(I)
ASI_DMMU_TSB_DIRECT_PTR
(I)
ASI_IMMU_TAG_TARGET
(I)
ASI_IMMU_TAG_ACCESS
(I)
ASI_IMMU_TSB_8KB_PTR
(I)
ASI_IMMU_TSB_64KB_PTR
19
IUG_PSTATE
R
Uncorrectable error in any of the following:
%pstate
,
%pc
,
%npc
,
CWP
,
CANSAVE
,
CANRESTORE
,
OTHERWIN
,
CLEANWIN
,
%pil
,
%wstate
18
IUG_TSTATE
R
Uncorrectable error in any of
TSTATE
,
TPC
,
TNP
.
17
IUG_%F
R
Uncorrectable error in any floating-point register or in the
FPRS
,
FSR
, or
GSR
register.
16
IUG_%R
R
Uncorrectable error in any general-purpose (integer) register, or in the
Y
,
CCR
,
or
ASI
register.
TABLE P-11
ASI_UGESR
Bit Description (2 of 4)
Bit
Name
RW Description