FUJITSU Implementation Supplement Fujitsu SPARC64 V - Manual (Page 130)

Release 1.0, 1 July 2002 F. Chapter L Address Space Identifiers 119
L.3.2 Special Memory Access ASIs
Please refer to Section L.3.3 in Commonality.
In addition to the ASIs described in Commonality, SPARC64 V supports the ASIs
described below.
ASI 53
16
( ASI_SERIAL_ID )
SPARC64 V provides an identification code for each processor. In other words, this
ID is unique for each processor chip. In conjunction with the Version Register (please
refer to Version (VER) Register on page 20), software can attain completely unique
chip identification code.
This register is defined as read-only; write operation is ignored.
6F
16
ASI_C_BSTWBUSY RW C0 123
70
16
–EE
16
( JPS1 )
EF
16
ASI_LBSYR0 RW 00 124
EF
16
ASI_LBSYR1 RW 08 124
EF
16
ASI_BSTW0 RW 80 124
EF
16
ASI_BSTW1 RW 88 124
F0
16
–FF
16
(JPS1)
TABLE L-1 SPARC64 V ASI Assignments (3 of 3)
Value ASI Name (Suggested Macro Syntax) Type VA Description Page
63 0
Chip_ID<63:0>