FUJITSU Implementation Supplement Fujitsu SPARC64 V - Manual (Page 60)

Release 1.0, 1 July 2002 F. Chapter A Instruction Definitions: SPARC64 V Extensions 49
A.12 Call and Link
SPARC64 V clears the upper 32 bits of the PC value in r[15] when PSTATE.AM is
set (impl. dep. #125). The value written into r[15] is visible to the instruction in the
delay slot.
SPARC64 V has a special hardware table, called the return address stack, to predict
the return address from a subroutine. Though the return prediction stack achieves
better performance in normal cases, there is a special use of the
CALL instruction
( call.+8 ) that may have an undesirable effect on the return address stack. In this
case, the CALL instruction is used to read the PC contents, not to call a subroutine. In
SPARC64 V, the return address of the CALL ( PC + 8 ) is not stored in its return
address stack, to avoid a detrimental performance effect. When a ret or retl is
executed, the value in the return address stack is used to predict the return address.
A.24 Implementation-Dependent Instructions
The IMPDEP1 and IMPDEP2 instructions are completely implementation dependent.
Implementation-dependent aspects include their operation, the interpretation of bits
29 – 25 and 18 –0 in their encodings, and which (if any) exceptions they may cause.
SPARC64 V uses IMPDEP1 to encode VIS instructions (impl. dep. #106).
SPARC64 V uses IMPDEP2B to encode the Floating-Point Multiply Add/Subtract
instructions (impl. dep. #106). See Section A.24.1, Floating-Point Multiply-Add/
Subtract, on page 50 for details.
See I.1.2, Implementation-Dependent and Reserved Opcodes, in Commonality for
information about extending the SPARC V9 instruction set by means of the
implementation-dependent instructions.
Compatibility Note – These instructions replace the CPop n instructions in
SPARC V8.
Exceptions implementation-dependent ( IMPDEP2 )
Opcode op3 Operation
IMPDEP1 11 0110 Implementation-Dependent Instruction 1
IMPDEP2 11 0111 Implementation-Dependent Instruction 2