FUJITSU Implementation Supplement Fujitsu SPARC64 V Instruction Manuals and User Guides
We have 1 Instruction Manual and User Guide for Implementation Supplement Fujitsu SPARC64 V FUJITSU
Manuals 
| Recognized languages: | English |
|---|---|
| Pages: | 255 |
| Size: | 2.55 MB |
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Document Outline
- SPARC JPS1 Implementation Supplement: Fujitsu SPARC64V
- Contents
- Overview
- Definitions
- Architectural Overview
- Data Formats
- Registers
- Instructions
- Traps
- Memory Models
- Instruction Definitions: SPARC64 V Extensions
- A.4 Block Load and Store Instructions (VIS I)
- A.12 Call and Link
- A.24 Implementation-Dependent Instructions
- A.29 Jump and Link
- A.30 Load Quadword, Atomic [Physical]
- A.35 Memory Barrier
- A.42 Partial Store (VIS I)
- A.49 Prefetch Data
- A.51 Read State Register
- A.70 SHUTDOWN (VIS I)
- A.70 Write State Register
- A.71 Deprecated Instructions
- IEEE Std 754-1985 Requirements for SPARC V9
- Implementation Dependencies
- Formal Specification of the Memory Models
- Opcode Maps
- Memory Management Unit
- Assembly Language Syntax
- Software Considerations
- Extending the SPARC V9 Architecture
- Changes from SPARC V8 to SPARC V9
- Programming with the Memory Models
- Address Space Identifiers
- Cache Organization
- Interrupt Handling
- Reset, RED_state, and error_state
- Error Handling
- P.1 Error Classification
- P.2 Action and Error Control
- P.3 Fatal Error and error_state Transition Error
- P.4 Urgent Error
- P.5 Instruction Access Errors
- P.6 Data Access Errors
- P.7 Restrainable Errors
- P.8 Handling of Internal Register Errors
- P.9 Cache Error Handling
- P.10 TLB Error Handling
- P.11 Handling of Extended UPA Bus Interface Error
- Performance Instrumentation
- UPA Programmer’s Model
- Summary of Differences between SPARC64 V and UltraSPARC-III
- Bibliography