Grass Valley Imagestore 750 v.2.0.1 - Manual (Page 172)

Front Panel Operations Imagestore 750 User Manual
Page 172 Miranda Technologies Inc.
The reason for this is that ancillary data such as timecode, captions and audio
metadata may be missed by downstream equipment if they are not seen on
the same line number that they were input on. Note that reference adjustment
affects the line number marking of the output stream. It needs to be adjusted
to match the input signal timing of the local facility.
An SDI data analyser is needed to monitor the timing of the SDI input
sources and the outputs with respect to the facility’s reference.
Clean switching between the inputs is made possible by buffering the inputs
in-line FIFOs to co-time them before processing. The reference timing will
adjust the active depth of the FIFOs to accommodate small timing differences
between the input signals.
The shortest video processing delay from any input through the Imagestore
750 to the PGM output occurs when the input line FIFO depth is at its
minimum. By increasing the output reference timing with respect to the A
input the FIFO depth is lengthened up to its maximum of 1 line.
Timing is dependent on the relative phase between the SDI input and the
reference. To illustrate the set up refer to the following example.
Example of HD-SDI Signals with Tri-Level Sync
This example deals with a system where the HD-SDI input arrives 3
µ
s later
than the associated tri level sync. Let’s call this timing ‘+0 ln +3
µ
s’.
To set the minimum delay through the unit:
For HD SDI standards the minimum processing delay is about 2.6
µ
s.
As the A input is 3
µ
s later than the tri level sync and PGM will be at least
2.6
µ
s later than A, as a minimum starting point set the reference timing to
2.6
µ
s + (0 ln +3
µ
s) = 0 ln +5.6
µ
s.
You must now increase the reference timing to buffer some data in the line
FIFOs. In the example above the line FIFO is now almost empty. This is a
very undesirable timing point as the FIFO is on the threshold of going from
empty to full if the input timing changes slightly, resulting in a 1 line vertical
shift. Furthermore, the whole video picture may show corruption precisely at
the FIFO empty point. Adding half a video line to the reference timing will
provide enough buffering to accommodate the largest timing differences
when the input is switched to a source that is not correctly co-timed.