Zilog ZUSBOPTS User Manual
Page 493
UM017105-0511
Glossary
Zilog Developer Studio II – ZNEO™
User Manual
465
S
SCF.
Set C Flag.
SL.
Shift Left.
SLL.
Shift Left Logical.
SP.
Stack Pointer.
SR.
Shift Right.
SRA.
Shift Right Arithmetic.
Static.
Characteristic of random-access memory that enables it to operate without clocking signals.
SUB.
Subtract.
T
tristate.
A form of transistor-to-transistor logic in which output stages, or input and output stages, can
assume three states. Two are normal low-impedance 1 and 0 states; the third is a high-impedance state that
allows many tristate devices to time-share bus lines. This industry term is not trademarked, and is available
for Zilog use. Do not use 3-state or three-state.
U
ULT.
Unsigned Less Than.
W
wait state.
A clock cycle during which no instructions are executed because the processor is waiting for
data from memory.
word.
Amount of data a processor can hold in its registers and process at one time.
write.
To make a permanent or transient recording of data in a storage device or on a data medium.
X
X.
1. Indexed Address. 2. An undefined or indeterminate variable.
XOR.
Bitwise exclusive OR.
Z
Z.
1. Zero. 2. Zero Flag.
ZDS.
Zilog Developer Studio. Zilog’s program development environment for Microsoft Windows.