Zilog ZUSBOPTS - Manual (Page 329)

UM017105-0511 Configuring Memory for Your Program
Zilog Developer Studio II – ZNEO™
User Manual
301
Chapter 7. Configuring Memory for Your
Program
The ZNEO CPU architecture provides a single unified address space for both internal and
external memory and I/O. Several address ranges within this space can be configured for
various purposes, providing a great deal of flexibility for creating a program configuration
tailored to your target design and application needs. The cost of this flexibility is that you
must understand how to set up the project settings and initialization to support your pre-
ferred configuration. This chapter provides the information required to configure your
project to support the programming model that best fits your needs.
This chapter covers the following topics:
•
ZNEO Memory Layout – see page 301
•
Programmer’s Model of ZNEO Memory – see page 303
•
Program Configurations – see page 308

The first two sections describe the relationship between the ZNEO CPU’s physical mem-
ory layout and the functional address ranges available to the programmer. Understanding
this relationship is the key to correctly configuring your project. The last section presents
several examples of program configuration, covering the configurations that are expected
to be most commonly used.
ZNEO Memory Layout
The ZNEO CPU has a unique memory architecture with a unified 24-bit physical address
space. (ZNEO CPU effective addresses are 32 bits wide, but current devices ignore bits
[31:24].) The physical address space can address four types of memory and I/O, as fol-
lows:
•
Internal nonvolatile memory
•
Internal RAM
•
Internal I/O memory and special-function registers (SFRs)
•
External memory and memory mapped peripherals

The internal memory and I/O are always present in ZNEO devices, and are located at spe-
cific address ranges in the unified address space. External memory or I/O is optional, and
its location in the address space is determined by the target hardware design.
To promote code efficiency, the ZNEO CPU supports shorter 16-bit data addressing for
the address ranges
00_0000H-00_7FFFH and FF_8000H-FF_FFFFH . 32-bit addressing