Assembler rules, Case sensitivity, Reserved words – Zilog ZUSBOPTS User Manual
Page 246
Source Language Structure
UM017105-0511
218
Zilog Developer Studio II – ZNEO™
User Manual
Case Sensitivity
In the default mode, the assembler treats all symbols as case-sensitive. Select the
Ignore
Case of Symbols
checkbox of the
General
page in the
Project Settings
dialog box to
have the assembler ignore the case of user-defined identifiers (see
– see page 49). Assembler reserved words are not case-sensitive.
Assembler Rules
Reserved Words
The following list contains reserved words that the assembler uses. You cannot use these
words as symbol names or variable names. Also, reserved words are not case-sensitive.
.ALIGN
.ASCII
.ASCIZ
.ASECT
.ASG
.BES
.BLOCK
.BSS
.BYTE
.chip
.COPY
.cpu
.DATA
.DEF
.define
.double
.DW24
.ELIF
.ELSE
.ELSEIF
.EMSG
.ENDIF
.ENDM
.ENDMAC
.ENDMACRO
.ENDSTRUCT
.EQU
.EVAL
.EVEN
.EXTERN
.FCALL
.file
.float
.FRAME
.GLOBAL
.IF
.IFNTRUE
.INCLUDE
.INT
.LIST
.LONG
.MACEND
.MACRO
.MAXBRANCH
.MLIST
.MMSG
.MNOLIST
.NEWBLOCK
.NOLIST
.ORG
.PAGE
.PUBLIC
.REF
.SBLOCK
.SECT
.SET
.SHORT_STACK_FRAME
.SPACE
.STRING
.STRUCT
.TAG
.TEXT
.trio
.USECT
.VAR
.VECTOR
.wmsg
.WORD
.word24
ALIGN
ASCII
ASCIZ
ASECT
B
BFRACT
BLKB
BLKL
BLKP
BLKW
BYTE
C
CHIP
COMMENT
COND
CONDLIST
CPU
DB
DBYTE
DD
DEFB
DEFINE
DF
DL
DS
DW
DW24