Programmer’s model of zneo memory – Zilog ZUSBOPTS User Manual
Page 331

UM017105-0511
Programmer’s Model of ZNEO Memory
Zilog Developer Studio II – ZNEO™
User Manual
303
ZNEO CPU-based devices have internal nonvolatile memory starting at address
00_0000H
. For example, a device equipped with 128K of Flash has internal nonvolatile
memory starting at address
00_0000H
and ending at address
01_FFFFH
.
ZNEO CPU-based devices have internal RAM ending at address
FF_BFFFH
, while the
beginning address (and hence the total extent of this area) is device dependent. For exam-
ple, a device equipped with 4K of RAM has internal RAM starting at address
FF_B000H
and ending at address
FF_BFFFH
.
ZNEO CPU-based devices reserve 8K of addresses for internal memory-mapped I/O,
located at addresses
FF_E000H-FF_FFFFH
. This memory contains CPU control registers
and other SFRs, on-chip peripherals, and memory-mapped I/O ports.
Finally, ZNEO CPU-based devices provide an external interface that allows seamless con-
nection to external memory and/or peripherals. External memory can be nonvolatile mem-
ory such as Flash, volatile (random access) memory, or both.
The external interface supports multiple chip select signals (CSx), which the target system
designer can use as required to enable different devices on the external interface. One chip
select is asserted whenever an external memory or I/O address is accessed. Each chip
select is available for use in a particular address range with a particular priority, but note
that the actual external address ranges available on a target system depend on its design.
For details about chip select priorities and address spaces, refer to the individual product
specification for your ZNEO CPU-based device.
To use ZDS II, a detailed understanding of chip selects is not required. It is only necessary
to enable and configure the chip selects used by the target system, and to add the actual
external address ranges, as implemented on the target, to the Address Spaces page of the
Project Settings
dialog box (see
).
Programmer’s Model of ZNEO Memory
Different address ranges in the 24-bit ZNEO CPU memory space are suited for different
functions, depending on whether the corresponding memory is volatile or nonvolatile,
whether it can be addressed using 16 or 32 bits, and whether it is reserved or otherwise
convenient for I/O. The following considerations affect the suitability of an address range
for various memory functions:
•
Volatile (random access) memory contents can be changed easily, so it is used for stor-
ing variable data, and can also contain program code downloaded temporarily or cop-
ied from nonvolatile memory.
•
Nonvolatile memory is not easily changed, but is also unaffected by power loss, so it
is used for storing constants, variable initializers, program code, option bits, and vec-
tors.