Altera Mentor Verification IP Altera Edition AMBA AXI4-Lite - Manual (Page 96)

Mentor Verification IP AE AXI4-Lite User Guide, V10.3 96
SystemVerilog Monitor BFM
SystemVerilog Monitor API
April 2014
To re-enable the AXI4_AWADDR_CHANGED_BEFORE_AWREADY assertion, follow the
above code sequence and assign the assertion within the
AXI4_CONFIG_ENABLE_ASSERTION bit vector to 1.
For a complete listing of AXI4-Lite assertions, refer to “ AXI4-Lite Assertions ” on page 369.
SystemVerilog Monitor API
This section describes the SystemVerilog Monitor API.
set_config()
This function sets the configuration of the monitor BFM.
Example
set_config(AXI4_CONFIG_MAX_TRANSACTION_TIME_FACTOR, 1000);
Prototype
function void set_config
(
input axi4_config_e config_name,
input axi4_max_bits_t config_val
);
Arguments config_name Configuration name:
AXI4_CONFIG_SETUP_TIME
AXI4_CONFIG_HOLD_TIME
AXI4_CONFIG_MAX_TRANSACTION_TIME_FACTOR
AXI4_CONFIG_AXI4LITE_axi4
AXI4_CONFIG_ENABLE_ALL_ASSERTIONS
AXI4_CONFIG_ENABLE_ASSERTION
AXI4_CONFIG_MAX_LATENCY_AWVALID_ASSERTION_
TO_AWREADY
AXI4_CONFIG_MAX_LATENCY_ARVALID_ASSERTION_
TO_ARREADY
AXI4_CONFIG_MAX_LATENCY_RVALID_ASSERTION_
TO_RREADY
AXI4_CONFIG_MAX_LATENCY_BVALID_ASSERTION_
TO_BREADY
AXI4_CONFIG_MAX_LATENCY_WVALID_ASSERTION_
TO_WREADY
AXI4_CONFIG_SLAVE_START_ADDR
AXI4_CONFIG_SLAVE_END_ADDR
config_val See “ Monitor BFM Configuration ” on page 92 for descriptions and valid
values.
Returns None