Set_write_response_valid_delay(), Example – Altera Mentor Verification IP Altera Edition AMBA AXI4-Lite User Manual
Page 248
Mentor Verification IP AE AXI4-Lite User Guide, V10.3
248
VHDL Slave BFM
set_write_response_valid_delay()
April 2014
set_write_response_valid_delay()
This nonblocking procedure sets the write_response_valid_delay field for a transaction that is
uniquely identified by the transaction_id field previously created by the
Example
-- Create a slave transaction. Creation returns tr_id to identify
-- the transaction.
create_slave_transaction(tr_id, bfm_index, axi4_tr_if_0(bfm_index));
-- Set the write response channel BVALID delay to 3 ACLK cycles for the
-- tr_id transaction.
set_write_response_valid_delay(3, tr_id, bfm_index,
axi4_tr_if_0(bfm_index));
Prototype
set_write_response_valid_delay
(
write_response_valid_delay: in integer;
transaction_id : in integer;
bfm_id : in integer;
path_id : in axi4_path_t; --optional
signal tr_if : inout axi4_vhd_if_struct_t
);
Arguments
write_response_valid_delay
Write data channel BVALID delay measured in ACLK
cycles for this transaction. Default: 0.
transaction_id
Transaction identifier. Refer to “
” on page 151 for more details.
bfm_id
BFM identifier. Refer to “
” on page 151 for more details.
path_id
(Optional) Parallel process path identifier:
AXI4_PATH_0
AXI4_PATH_1
AXI4_PATH_2
AXI4_PATH_3
AXI4_PATH_4
Refer to “
Overloaded Procedure Common Arguments
page 151 for more details.
tr_if
Transaction signal interface. Refer to “
” on page 151 for more
details.
Returns
None