Altera Mentor Verification IP Altera Edition AMBA AXI4-Lite - Manual (Page 46)

Mentor Verification IP AE AXI4-Lite User Guide, V10.3 46
SystemVerilog Master BFM
create_write_transaction()
April 2014
create_write_transaction()
This nonblocking function creates a write transaction with a start address addr argument. All
other transaction fields default to legal protocol values, unless previously assigned a value. It
returns with the axi4_transaction record.
Prototype
function automatic axi4_transaction create_write_transaction
(
input bit [((AXI4_ADDRESS_WIDTH) - 1):0] addr);
Arguments addr Start address
Protocol
Transaction
Fields
prot Protection:
AXI4_NORM_SEC_DATA; (default)
AXI4_PRIV_SEC_DATA;
AXI4_NORM_NONSEC_DATA;
AXI4_PRIV_NONSEC_DATA;
AXI4_NORM_SEC_INST;
AXI4_PRIV_SEC_INST;
AXI4_NORM_NONSEC_INST;
AXI4_PRIV_NONSEC_INST;
data_words Data words.
write_strobes Write strobes:
Each strobe 0 or 1.
resp Burst response:
AXI4_OKAY;
AXI4_SLVERR;
AXI4_DECERR;
Operational
Transaction
Fields gen_write_strobes Generate write strobes flag:
0 = user supplied write strobes.
1 = auto-generated write strobes (default).
operation_mode Operation mode:
AXI4_TRANSACTION_NON_BLOCKING;
AXI4_TRANSACTION_BLOCKING; (default)
write_data_mode Write data mode:
AXI4_DATA_AFTER_ADDRESS; (default)
AXI4_DATA_WITH_ADDRESS;
Operational
Transaction
Fields address_valid_delay Address channel AWVALID delay measured in ACLK cycles for
this transaction (default = 0).
data_valid_delay Write data channel WVALID delay measured in ACLK cycles for
this transaction (default = 0).
write_response_
ready_delay Write response channel BREADY delay measured in ACLK
cycles for this transaction (default = 0).
transaction_done Write transaction done flag for this transaction.
Returns
The axi4_transaction record.