Altera Mentor Verification IP Altera Edition AMBA AXI4-Lite - Manual (Page 156)

Mentor Verification IP AE AXI4-Lite User Guide, V10.3 156
VHDL Master BFM
VHDL Master API
April 2014
Note
Do not confuse the AXI4_CONFIG_ENABLE_ASSERTION bit vector with the
AXI4_CONFIG_ENABLE_ALL_ASSERTIONS global enable/disable.
To re-enable the AXI4_AWADDR_CHANGED_BEFORE_AWREADY assertion, follow the
above code sequence and assign the assertion within the
AXI4_CONFIG_ENABLE_ASSERTION bit vector to 1.
For a complete listing of assertions, refer to “ AXI4-Lite Assertions ” on page 369.
VHDL Master API
This section describes the VHDL Master API.
set_config()
This nonblocking procedure sets the configuration of the master BFM.
Prototype procedure set_config
(
config_name : in std_logic_vector(7 downto 0);
config_val : in std_logic_vector(AXI4_MAX_BIT_SIZE-1 downto
0)|integer;
bfm_id : in integer;
path_id : in axi4_path_t; -- optional
signal tr_if : inout axi4_vhd_if_struct_t
);
Arguments config_name Configuration name:
AXI4_CONFIG_SETUP_TIME
AXI4_CONFIG_HOLD_TIME
AXI4_CONFIG_MAX_TRANSACTION_TIME_FACTOR
AXI4_CONFIG_AXI4LITE_axi4
AXI4_CONFIG_ENABLE_ALL_ASSERTIONS
AXI4_CONFIG_ENABLE_ASSERTION
AXI4_CONFIG_MAX_LATENCY_AWVALID_
ASSERTION_TO_AWREADY
AXI4_CONFIG_MAX_LATENCY_ARVALID_
ASSERTION_TO_ARREADY
AXI4_CONFIG_MAX_LATENCY_RVALID_
ASSERTION_TO_RREADY
AXI4_CONFIG_MAX_LATENCY_BVALID_
ASSERTION_TO_BREADY
AXI4_CONFIG_MAX_LATENCY_WVALID_
ASSERTION_TO_WREADY
AXI4_CONFIG_SLAVE_START_ADDR
AXI4_CONFIG_SLAVE_END_ADDR
config_val Refer to “ Master BFM Configuration ” on page 152 for description and
valid values.
bfm_id BFM identifier. Refer to “ Overloaded Procedure Common Arguments ”
on page 151 for more details.