Altera Mentor Verification IP Altera Edition AMBA AXI4-Lite - Manual (Page 377)

AXI4-Lite Assertions
Mentor Verification IP AE AXI4-Lite User Guide, V10.3 377
April 2014
AXI4-
60109 AXI4_INVALID_WRITE_STROBES_ON_
UNALIGNED_WRITE_TRANSFER Write strobe(s) incorrect for
address/size of an unaligned
transaction. A3.4.3
AXI4-
60110 AXI4_MINIMUM_SLAVE_ADDRESS_
SPACE_VIOLATION The minimum address space
occupied by a single slave device is
4 kilobytes. A10.3.2
AXI4-
60111 AXI4_NON_INCREASING_REGION_
SPECIFICATION A region address-range has an
upper bound smaller than the lower
bound.
AXI4-
60112 AXI4_NON_ZERO_ARQOS The master is configured to not
participate in the Quality-of-Service
scheme but ARQOS is not 4'b0000
as it should be. A8.1.2
AXI4-
60113 AXI4_NON_ZERO_AWQOS The master is configured to not
participate in the Quality-of-Service
scheme but AWQOS is not 4'b0000
as it should be. A8.1.2
AXI4-
60114 AXI4_OVERLAPPING_REGION An address-range in the region map
overlaps with another address in the
region map. A8.2.1.
AXI4-
60115 AXI4_PARAM_READ_DATA_BUS_WIDTH The value of AXI4_RDATA_WIDTH
must be one of
8,16,32,64,128,256,512, or 1024. A1.3.1
AXI4-
60116 AXI4_PARAM_READ_REORDERING_
DEPTH_EQUALS_ZERO The user-supplied
config_read_data_reordering_depth
should be greater than zero. A5.3.1
AXI4-
60117 AXI4_PARAM_READ_REORDERING_
DEPTH_EXCEEDS_MAX_ID The user-supplied
config_read_data_reordering_depth
exceeds the maximum possible
value as defined by the
AXI4_ID_WIDTH parameter. A5.3.1
AXI4-
60118 AXI4_PARAM_WRITE_DATA_BUS_
WIDTH The value of AXI4_WDATA_WIDTH
must be one of
8,16,32,64,128,256,512, or 1024. A1.3.1
AXI4-
60119 AXI4_READ_ALLOCATE_WHEN_NON_
MODIFIABLE_12 The RA bit of the cache parameter
should not be HIGH when the
Modifiable bit is LOW. A4.4
AXI4-
60120 AXI4_READ_ALLOCATE_WHEN_NON_
MODIFIABLE_13 The RA bit of the cache parameter
should not be HIGH when the
Modifiable bit is LOW. A4.4
AXI4-
60121 AXI4_READ_ALLOCATE_WHEN_NON_
MODIFIABLE_4 The RA of the cache parameter bit
should not be HIGH when the
Modifiable bit is LOW. A4.4
AXI4-
60122 AXI4_READ_ALLOCATE_WHEN_NON_
MODIFIABLE_5 The RA of the cache parameter bit
should not be HIGH when the
Modifiable bit is LOW. A4.4
Table A-1. AXI4 Assertions (cont.)
Error
Code Error Name Description Property
Ref