Maxim Integrated High-Speed Microcontroller Users Guide: Network Microcontroller Supplement - Manual (Page 67)

High-Speed Microcontroller User’s
Guide: Network Microcontroller
Supplement
67
CAN 0 Message Center 14 Control Register (C0M14C)
R = Unrestricted read, C = Clear only, * = See description, -n = Value after reset
This SFR is not present on the DS80C411.
CAN 0 Message Center 15 Control Register (C0M15C)
R = Unrestricted read, C = Clear only, * = See description, -n = Value after reset
This SFR is not present on the DS80C411.
Serial Port Control (SCON1)
R = Unrestricted read, W = Unrestricted write, -n = Value after reset
7 6 5 4 3 2 1 0
SFR BEh MSRDY ETI ERI INTRQ EXTRQ MTRQ ROW/TIH DTUP
RW-0 RW-0 RW-0 RW-0 RC-0 R*-0 R*-0 R*-0
7 6 5 4 3 2 1 0
SFR BFh MSRDY ETI ERI INTRQ EXTRQ MTRQ ROW/TIH DTUP
RW-0 RW-0 RW-0 RW-0 RC-0 R*-0 R*-0 R*-0
7 6 5 4 3 2 1 0
SFR C0h SM0/FE_1 SM1_1 SM2_1 REN_1 TB8_1 RB8_1 TI_1 RI_1
RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0
C0M14C
Bits 7–0 Operation of the bits in this register are identical to those found in the CAN 0 message 1 control regis-
ter (C0M1C: ABh). Please consult the description of that register for more information.
C0M15C
Bits 7–0 Operation of the bits in this register are identical to those found in the CAN 0 message 1 control regis-
ter (C0M1C: ABh). Please consult the description of that register for more information.
SM0/FE_1
Bit 7
SM1_1
Bit 6
SM2_1
Bit 5
REN_1
Bit 4
Serial port 1 mode bit 0. When SMOD0 is set to 1, it is the framing error flag that is set upon detection
of an invalid stop bit and must be cleared by software. Modification of this bit when SMOD0 is set has
no effect on the serial mode setting.
Serial port 1 mode bit 1.
Serial port 1 mode bit 2. Setting of this bit in mode 1 ignores reception if an invalid stop bit is detect-
ed. Setting this bit in mode 2 or 3 enables multiprocessor communications. This prevents the RI_1 bit
from being set and interrupt being asserted, if the 9th bit received is 0.
Receive enable.
REN_0 = 0: serial port 1 reception disabled.
REN_0 = 1: serial port 1 receiver enabled for modes 1, 2, and 3.
Initiate synchronous reception for mode 0.
SM0-2
Bits 7-5 Serial port 1 mode. These bits control the mode of serial port 1 as follows.
SM0 SM1 SM2 MODE FUNCTION LENGTH PERIOD
0 0 0 0 Synchronous 8 bits 12 tCLK
0 0 1 0 Synchronous 8 bits 4 tCLK
0 1 X 1 Asynchronous 10 bits Timer 1
1 0 0 2 Asynchronous 11 bits
64 tCLK (SMOD
32 tCLK (SMOD
1 0 1 2 Asynchronous w/ multiprocessor communication 11 bits
64 tCLK (SMOD
32 tCLK (SMOD
1 1 0 3 Asynchronous 11 bits Timer 1
1 1 1 3 Asynchronous w/ multiprocessor communication 11 bits Timer 1
SM0 SM1 SM2 MODE FUNCTION LENGTH PERIOD
0 0 0 0 Synchronous 8 bits 12 tCLK
0 0 1 0 Synchronous 8 bits 4 tCLK
0 1 X 1 Asynchronous 10 bits Timer 1
1 0 0 2 Asynchronous 11 bits
64 tCLK (SMOD=0)
32 tCLK (SMOD=1)
1 0 1 2 Asynchronous w/ multiprocessor communication 11 bits
64 tCLK (SMOD=0)
32 tCLK (SMOD=1)
1 1 0 3 Asynchronous 11 bits Timer 1
1 1 1 3 Asynchronous w/ multiprocessor communication 11 bits Timer 1
Maxim Integrated