Maxim Integrated High-Speed Microcontroller Users Guide: Network Microcontroller Supplement - Manual (Page 58)

High-Speed Microcontroller User’s
Guide: Network Microcontroller
Supplement
58
DTUP
Bit 0
If the message center being set up with WTOE = 1 was previously a transmit message center, ensure
that the TIH bit is cleared to 0 (TIH can only be written while T/R is set to 1). If TIH is set to 1 and that
message center is changed to receive with WTOE = 1, the ROW bit will always read back a 1, even
though a receive overwrite condition may not have occurred.
Data updated. (DTUP is unrestricted read.) When T/R = 0, DTUP can only be cleared to a 0 when written
by the microcontroller. A write of a 1 to DTUP with T/R = 0 leaves the DTUP bit unchanged. A write of a 1
to DTUP with T/R = 1 leaves the MTRQ bit unchanged. DTUP is unrestricted read/write when T/R = 1.
The DTUP bit has a dual function depending on whether a message is configured for transmit or receive
by the T/R bit in the CAN 0 message format register. The DTUP bit is set to a 1 by either the microcon-
troller (when in transmit) or by the CAN 0 controller (when in receive) to signify that new data has been
loaded into the data portion of the message.
Transmission mode (T/R = 1). The microcontroller sets TIH = 1 and clears DTUP = 0 prior to doing an
update of the associated message center. This prevents the CAN processor from transmitting the data
while the microcontroller is updating it. Once the microcontroller has finished configuring the message
center, the microcontroller clears TIH = 0 and sets MSRDY = 1, MTRQ = 1 and DTUP = 1 to enable the
CAN processor to transmit the data.The CAN processor does not clear the DTUP after the transmission,
but the microcontroller is able to determine that the transmission has been completed by checking the
MTRQ bit, which is cleared (MTRQ = 0) after the transmission has been successfully completed.
Receive mode (T/R = 0). The CAN processor sets the DTUP bit when it has completed a successful
reception and storage of the incoming message to the respective message center. The CAN processor
does not clear the DTUP after the microcontroller has read the associated data. That function is left to
the microcontroller.
When operating in the receive mode (T/R = 0), the DTUP = 1 signal notifies the microcontroller that the
respective message center has new data to be read by the microcontroller. The DTUP bit is used in two
ways when doing the read of the message center, as determined by the WTOE bit in the CAN 0 mes-
sage 1 arbitration register 3 (C0M1AR3).
When WTOE = 1 and the CAN processor is allowed to perform overwrites of respective message cen-
ters, the microcontroller uses the DTUP bit to establish the validity of each message read. Clearing
DTUP = 0 before a read of a receive message center and then reading the DTUP bit after finishing the
message center read, the microcontroller can determine if new data was loaded (DTUP = 1) or not
(DTUP = 0) into the message center during the microcontroller read of the message center.
If DTUP = 1, then there was new data stored to the message center while the microcontroller was per-
forming the message center read. This status condition requires the microcontroller to again clear the
DTUP bit and perform a second read of the message center to verify that the data it reads is completely
updated.
If DTUP = 0, the message center data read by the microcontroller had not been updated while it was
being read by the microcontroller, and the data is complete.
When WTOE = 0 and the CAN processor is not allowed to perform overwrites of respective message
centers, the microcontroller only needs to clear DTUP = 0 after performing the read of the message cen-
ter. The CAN processor is not allowed to write into a message center where the DTUP = 1 state exists.
The DTUP bit is never cleared by the CAN processor, but is set as per the above discussion. The only
mechanism used to clear the DTUP bit is the microcontroller or a system reset or the setting of the CRST
bit.
When T/R = 1, all message center transmissions are automatically disabled until both DTUP = 1 and TIH
= 0. This mechanism prevents the CAN from sending incomplete data.
Remote frame transmissions are not affected by the TIH bit in the receive mode (T/R = 0), since this
function does not exist in this mode. In a similar fashion, the state of the DTUP bit does not inhibit remote
frame request transmissions in the receive mode. The only gating item for remote frame transmissions
in the receive mode (T/R = 0) is the setting of both the MSRDY = 1 and MTRQ = 1 bits.
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