Threefold bit sampling – Maxim Integrated High-Speed Microcontroller Users Guide: Network Microcontroller Supplement User Manual
Page 163
High-Speed Microcontroller User’s
Guide: Network Microcontroller
Supplement
163
The timing of the various time segments is determined by using the following formulae. Most users never need to perform these cal-
culations, as other devices already attached to the network dictate the bus timing parameters.
(Only integer values are permitted.)
Where BPRV is the CAN baud-rate prescaler value found in the earlier description of the C0BT0 register, F
OSC
is the crystal or external
oscillator frequency of the microprocessor, and TS1_LEN and TS2_LEN are listed in the description of the TSEG26-24 and TSEG13–10
bits in the CAN bus timing register 1. SJW is listed in the description of the SJW1-0 bits in the CAN bus timing register 0. The CAN clock
divide value (CCD) is a factor connected to the current microcontroller system clock selection and can be referenced in the following
table.
The following restrictions apply to the above equations:
t
TSEG1
≥ t
TSEG2
t
TSEG2
≥ t
SJW
t
SJW
< t
TSEG1
2
≤ TS1_LEN ≤ 16
2
≤ TS2_LEN ≤ 8
(TS1_LEN + TS2_LEN + 1)
≤ 25
The nominal bit time applies when a synchronization edge falls within the t
SYNC_SEG
period. The maximum bit time occurs when the syn-
chronization edge falls outside of the t
SYNC_SEG
period, and the synchronization jump width time is added to perform the resynchro-
nization.
Threefold Bit Sampling
The DS80C400 supports the ability to perform one or three samplings of each bit, based on the SMP bit (C0BT1.7). The single sample
mode (SMP = 0) is available in all settings and takes one sample during each bit time. The triple sampling mode (SMP = 1) samples
each bit three times for increased noise immunity. This mode can be used only when the baud-rate prescale value (BPRV) is greater
than 3.
No
al bit time
t
t
t
SYNC
SEG
TSEG
TS
min
Д
Д
_
=
+
+
1
E
EG
BRPV CCD
TS
LEN
TS
LEN
2
1
1
2
=
+
+
(
)(
)[
(
_
)
(
_
)]
F
Fosc
Maximum bit time
t
t
SYNC
SEG
TSEG
_
=
+
1
++
+
=
+
(
)(
)[
(
_
)
t
t
BRPV CCD
TS
LEN
TSEG
SJW
2
1
1
++
+
=
(
_
)
(
)]
Ä
TS
LEN
SJW
Fosc
CAN baud rate
Fosc
2
((
)(
)[
(
_
)
(
_
)
BRPV CCD
TS
LEN
TS
LEN
1
1
2
+
+
CD1
CD0
4X/2
2
2
2X
X
X
X
CCD
0
0
1
0.5
0
0
0
1
1
0
x
2
1
1
x
512
t
BRPV
CCD
F
t
t
t
TS
LEN
t
t
TS
LEN
t
t
t
BAUD RATE
t
QU
OSC
SYNC SEG
QU
TSEG
QU
TSEG
QU
SJW
SJW
t
QU PER BIT
QU
QU
(
_
)
(
_
)
_
(
)
=
Ч
=
Ч
=
Ч
=
Ч
=
Ч
=
Ч
1
1
2
1
1
2
Maxim Integrated