Maxim Integrated High-Speed Microcontroller Users Guide: Network Microcontroller Supplement - Manual (Page 36)

High-Speed Microcontroller User’s
Guide: Network Microcontroller
Supplement
36
CAN 0 Receive Message Stored Register 0 (C0RMS0)
7 6 5 4 3 2 1 0
SFR 96h C0RMS0.7 C0RMS0.6 C0RMS0.5 C0RMS0.4 C0RMS0.3 C0RMS0.2 C0RMS0.1 C0RMS0.0
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
R = Unrestricted read, -n = Value after reset. The C0RMS0 is cleared to 00h on all forms of reset, including the reset established by the CRST bit.
This SFR is not present on the DS80C411.
C0RMS0.7–0
C0RMS0.7
Bit 7
C0RMS0.6
Bit 6
C0RMS0.5
Bit 5
C0RMS0.4
Bit 4
C0RMS0.3
Bit 3
C0RMS0.2
Bit 2
C0RMS0.1
Bit 1
C0RMS0.0
Bit 0
CAN 0 receive message stored register 0. The C0RMS0 bits indicate which message center (1–8) has
successfully received and stored the last incoming message. The content of the C0RMS0 register is
updated each time a new message is successfully received and stored. The contents of the C0RMS0
register are automatically cleared following each read of C0RMS0 by the microcontroller. A bit value 1
indicates that the assigned message center has successfully received and stored new data since the
last read of the C0RMS0 register. A bit value 0 indicates that no new message has been successfully
received and stored since the last read of the RMS0 register. No interrupts are asserted because of the
C0RMS0 settings. This register works fully independent of the status bits in the CAN status register and
the INTIN7–0 vector in the CAN interrupt register, as well as of the INTRQ bit in the CAN message con-
trol registers.
Message center 8, message received and stored.
Message center 7, message received and stored.
Message center 6, message received and stored.
Message center 5, message received and stored.
Message center 4, message received and stored.
Message center 3, message received and stored.
Message center 2, message received and stored.
Message center 1, message received and stored.
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