Maxim Integrated High-Speed Microcontroller Users Guide: Network Microcontroller Supplement - Manual (Page 127)

High-Speed Microcontroller User’s
Guide: Network Microcontroller
Supplement
127
Using Timer 1 or Timer 3 for Baud-Rate Generation
The following text and Table 12-5 describe the use of timer 1 for baud-rate generation. This information can also be used to describe
the use of timer 3 for baud-rate generation by replacing every timer 1 reference with a corresponding timer 3 reference (timer 3 ≥ timer
1, TH3 ≥ TH1, T3M ≥ T1M).
To use timer 1 as the baud-rate generator, it is commonly put into the 8-bit autoreload mode. In this way, the CPU is not involved in
baud-rate generation. Note that the timer interrupt should not be enabled. In the 8-bit autoreload mode (timer 1, mode 2), the reload
value is stored in TH1. Thus, the combination of timer 1 input clock frequency and TH1 determines the baud rate.
The timer 1 input clock, relative to the external crystal clock, can be altered in two ways: 1) by changing the system clock, or 2) by
changing the timer input clock-divide ratio. Modifying the system clock is accomplished using the clock divide bits (CD1:0) found in
the PMR SFR. This procedure is discussed in Section 5. The timer 1 input clock divide ratio is configurable using the T1M (CKCON.4)
register bit. For the default T1M setting (= 0), a system clock frequency divided by 12 signals drives timer 1. Setting the T1M bit to a
logic 1 provides a system clock divided by 4 input to timer 1. When using power-management mode, setting T1M to a logic 1 results
in the system clock (OSC / 1024) being used as the input clock to timer 1. If T1M is clear (= 0) in power-management mode, the sys-
tem clock divided by 3 (OSC / 3072) is provided to timer 1. Table 12-5 summarizes the relationship between the external crystal fre-
quency and the timer 1 input clock for the various configurations.
Table 12-5. Relationship Between External Crystal Frequency and Timer 1
Using timer 1 in the 8-bit autoreload mode, serial port baud rates for mode 1 or 3 can be calculated using the following formula:
Timer 1 input clock frequency can be found in Table 12-5, SMOD_x is the logic state of the baud-rate doubler bit for the associated
UART, and TH1 is the user-assigned timer 1 reload value.
Often, users already know what baud rate is desired and need to calculate the timer reload value. The following equation calculates
the timer reload value:
Note that the 8-bit autoreload mode for timer 1 is the one most commonly used for serial port applications, but it can actually be con-
figured in any mode, even as a counter.
Using Timer 2 for Baud-Rate Generation
To use timer 2 as baud-rate generator for serial port 0, the timer is configured in autoreload mode. Then, either the TCLK or RCLK bit
(or both) is set to a logic 1. TCLK = 1 selects timer 2 as the baud-rate generator for the transmitter and RCLK = 1 selects timer 2 for
the receiver. Thus, serial port 0 can have the transmitter and receiver operating at different baud rates by choosing timer 1 for one data
direction and timer 2 for the other. RCLK and TCLK reside in T2CON.4 and TCON.5, respectively.
Although the timer 2 input clock can be configured similarly to timer 1, it must be placed into a baud-rate generator mode in order to
be used by serial port 0. Setting either RCLK or TCLK to a logic 1 selects timer 2 for baud-rate generation. When this is done, the timer
2 input clock becomes fixed to the oscillator frequency divided by 2. This is compatible with the 80C32. The only exception is when
timer 2 is used for baud-rate generation within power-management mode. For PMM, the system clock (OSC / 1024) is used as the input
clock for timer 2. The timer 2 interrupt is automatically disabled when either RCLK or TCLK is set. Also, the TF2 (TCON.7) flag cannot
be set on a timer rollover. The manual reload pin, T2EX (P1.1), does not cause a reload either. Table 12-6 illustrates this relationship.
TH
timer input clock frequency
baud rate
SMOD X
1 256
2 1
32
_
= −
Ч
Ч
Mode baud rate
Timer input clock frequency
TH
SMOD X
,
( )
_
1 3
2
32
1
256 1
= ×
−
MODE 1, 3
SERIAL PORT CLOCK FREQUENCY
OSCILLATOR CYCLES PER
MACHINE CYCLE
PMR REGISTER BITS
4X/2X, CD1, CD0
T1M = 0 T1M = 1
1 (4x mode) 100 OSC / 12 OSC / 1
2 (2x mode) 000 OSC / 12 OSC / 2
4 (default) X01, X10 OSC / 12 OSC / 4
1024 (PMM) X11 OSC / 3072 OSC / 1024
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