Maxim Integrated High-Speed Microcontroller Users Guide: Network Microcontroller Supplement - Manual (Page 140)

High-Speed Microcontroller User’s
Guide: Network Microcontroller
Supplement
140
SJW1, SJW0
Bits 7–6 CAN synchronization jump width select. These bits specify the maximum number of time quanta (t
qu )
cycles that a bit can be lengthened or shortened in one resynchronization to compensate for phase
errors detected by the CAN controller when receiving data. These bits can be modified only during a
software initialization (SWINT = 1).
SJW1 SJW0
SYNCHRONIZATION
JUMP WIDTH
(Number in parentheses
is SJW value used in bit
timing calculations)
0 0 1 t qu (1)
0 1 2 t qu (2)
1 0 3 t qu (3)
1 1 4 t qu (4)
BPR5–BPR0
Bits 5–0 CAN baud-rate prescaler. These bits specify the lower 6 bits (BPR5–BPR0) of the 8-bit prescale value
(BPR7–BPR0). The 256 states defined by the binary combinations of the BPR7–BPR0 bits determine the
value of the prescale that, in turn, defines the cycle time associated with one-time quanta. These bits
can be modified only during a software initialization (SWINT = 1). The BPR7, BPR6 bits are located in
the COR (CEh) SFR.
BPR7,
BPR6
BPR5 BPR4 BPR3 BPR2 BPR1 BPR0
BAUD-RATE PRESCALE VALUE
(BRPV)
00 0 0 0 0 0 0 1
00 0 0 0 0 0 1 2
— — — — — — — —
— — — — — — — —
11 1 1 1 1 1 0 255
11 1 1 1 1 1 1 256
CAN 0 Bus Timing Register 0 (C0BT0)
MOVX Address 1 7 6 5 4 3 2 1 0
xxxx04h SJW1 SJW0 BPR5 BPR4 BPR3 BPR2 BPR1 BPR0
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